diff options
| author | Zhang, Chao B <chao.b.zhang@intel.com> | 2018-07-16 15:12:15 +0800 |
|---|---|---|
| committer | Zhang, Chao B <chao.b.zhang@intel.com> | 2018-07-17 07:47:04 +0800 |
| commit | 60ee3bd8dbe70189cab18af733c42187c9b317c7 (patch) | |
| tree | dffc08bd1c91d09f1599c4ce29e5549ba3f78b9e /SecurityPkg/Tcg/Tcg2Smm | |
| parent | 4c6d0de7bad46fc15fd34d394dffda3766e3a6a1 (diff) | |
| download | edk2-60ee3bd8dbe70189cab18af733c42187c9b317c7.tar.gz edk2-60ee3bd8dbe70189cab18af733c42187c9b317c7.tar.bz2 edk2-60ee3bd8dbe70189cab18af733c42187c9b317c7.zip | |
SecurityPkg:Tcg: Fix comment typos
"Triggle" is a typo. Replace it with "Trigger"
Cc: Long Qin <qin.long@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Long Qin <qin.long@intel.com>
Diffstat (limited to 'SecurityPkg/Tcg/Tcg2Smm')
| -rw-r--r-- | SecurityPkg/Tcg/Tcg2Smm/Tpm.asl | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl index 50dea0ab9a..471b6b1fa1 100644 --- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl +++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl @@ -259,12 +259,12 @@ DefinitionBlock ( If (LNot (And (MORD, 0x10)))
{
//
- // Triggle the SMI through ACPI _PTS method.
+ // Trigger the SMI through ACPI _PTS method.
//
Store (0x02, MCIP)
//
- // Triggle the SMI interrupt
+ // Trigger the SMI interrupt
//
Store (MCIN, IOB2)
}
@@ -365,7 +365,7 @@ DefinitionBlock ( Store (0x02, PPIP)
//
- // Triggle the SMI interrupt
+ // Trigger the SMI interrupt
//
Store (PPIN, IOB2)
Return (FRET)
@@ -396,7 +396,7 @@ DefinitionBlock ( Store (0x05, PPIP)
//
- // Triggle the SMI interrupt
+ // Trigger the SMI interrupt
//
Store (PPIN, IOB2)
@@ -428,7 +428,7 @@ DefinitionBlock ( }
//
- // Triggle the SMI interrupt
+ // Trigger the SMI interrupt
//
Store (PPIN, IOB2)
Return (FRET)
@@ -442,7 +442,7 @@ DefinitionBlock ( Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
//
- // Triggle the SMI interrupt
+ // Trigger the SMI interrupt
//
Store (PPIN, IOB2)
@@ -476,12 +476,12 @@ DefinitionBlock ( Store (DerefOf (Index (Arg2, 0x00)), MORD)
//
- // Triggle the SMI through ACPI _DSM method.
+ // Trigger the SMI through ACPI _DSM method.
//
Store (0x01, MCIP)
//
- // Triggle the SMI interrupt
+ // Trigger the SMI interrupt
//
Store (MCIN, IOB2)
Return (MRET)
|