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| author | Jian J Wang <jian.j.wang@intel.com> | 2019-02-28 15:16:25 +0800 |
|---|---|---|
| committer | Jian J Wang <jian.j.wang@intel.com> | 2019-03-01 11:17:17 +0800 |
| commit | 2a93cccc24cfca12c66f13a41d52fb0a82fb924e (patch) | |
| tree | 981504ec526e8d28f97d19adf03c2b0928065dfc /UefiCpuPkg/CpuDxe | |
| parent | a6c63ee6d5d842bb8c4663c5140ae2c8e7360cac (diff) | |
| download | edk2-2a93cccc24cfca12c66f13a41d52fb0a82fb924e.tar.gz edk2-2a93cccc24cfca12c66f13a41d52fb0a82fb924e.tar.bz2 edk2-2a93cccc24cfca12c66f13a41d52fb0a82fb924e.zip | |
UefiCpuPkg: restore strict page attributes via #DB in nonstop mode only
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1576
The root cause of this issue is that non-stop mode of Heap Guard and
NULL Detection set TF bit (single-step) in EFLAG unconditionally in
the common handler in CpuExceptionLib.
If PcdCpuSmmStaticPageTable is FALSE, the SMM will only create page
table for memory below 4G. If SMM tries to access memory beyond 4G,
a page fault exception will be triggered and the memory to access
will be added to page table so that SMM code can continue the access.
Because of above issue, the TF bit is set after the page fault is
handled and then fall into another DEBUG exception. Since non-stop
mode of Heap Guard and NULL Detection are not enabled, no special
DEBUG exception handler is registered. The default handler just
prints exception context and go into dead loop.
Actually EFLAGS can be changed in any standard exception handler.
There's no need to do single-step setup in assembly code. So the fix
is to move the logic to C code part of page fault exception handler
so that we can fully validate the configuration and prevent TF bit
from being set unexpectedly.
Fixes: dcc026217fdc363f55c217039fc43d344f69fed6
16b918bbaf51211a32ae04d9d8a5ba6ccca25a6a
Test:
- Pass special test of accessing memory beyond 4G in SMM mode
- Boot to OS with Qemu emulator platform (Fedora27, Ubuntu18.04,
Windows7, Windows10)
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'UefiCpuPkg/CpuDxe')
| -rw-r--r-- | UefiCpuPkg/CpuDxe/CpuPageTable.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c index 4bee8c7772..812537417d 100644 --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c @@ -1300,7 +1300,16 @@ PageFaultExceptionHandler ( // Display ExceptionType, CPU information and Image information
//
DumpCpuContext (ExceptionType, SystemContext);
- if (!NonStopMode) {
+ if (NonStopMode) {
+ //
+ // Set TF in EFLAGS
+ //
+ if (mPagingContext.MachineType == IMAGE_FILE_MACHINE_I386) {
+ SystemContext.SystemContextIa32->Eflags |= (UINT32)BIT8;
+ } else {
+ SystemContext.SystemContextX64->Rflags |= (UINT64)BIT8;
+ }
+ } else {
CpuDeadLoop ();
}
}
|