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authorEric Dong <eric.dong@intel.com>2018-08-10 10:41:04 +0800
committerEric Dong <eric.dong@intel.com>2018-08-16 08:42:01 +0800
commitb581721063027cb6335cada04d4a898b9dadd1a3 (patch)
tree0ab7ff86de68d0ed75683efd1718c4ec25b4a799 /UefiCpuPkg/CpuS3DataDxe
parentfcd92f16af8fd61d220fbd58af3198083180ae6e (diff)
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UefiCpuPkg/CpuS3DataDxe: Change Memory Type and address limitation.
Because CpuS3Data memory will be copy to smram at SmmReadyToLock point, the memory type no need to be ACPI NVS type, also the address not limit to below 4G. This change remove the limit of ACPI NVS memory type and below 4G. Pass OS boot and resume from S3 test. Cc: Marvin Häuser <Marvin.Haeuser@outlook.com> Cc: Fan Jeff <vanjeff_919@hotmail.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/CpuS3DataDxe')
-rw-r--r--UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c34
-rw-r--r--UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf1
2 files changed, 28 insertions, 7 deletions
diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
index dccb406b8d..3e8c8b383c 100644
--- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
+++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
@@ -31,6 +31,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DebugLib.h>
#include <Library/MtrrLib.h>
+#include <Library/MemoryAllocationLib.h>
#include <Protocol/MpService.h>
#include <Guid/EventGroup.h>
@@ -82,6 +83,28 @@ AllocateAcpiNvsMemoryBelow4G (
}
/**
+ Allocate memory and clean it with zero.
+
+ @param[in] Size Size of memory to allocate.
+
+ @return Allocated address for output.
+
+**/
+VOID *
+AllocateZeroPages (
+ IN UINTN Size
+ )
+{
+ VOID *Buffer;
+
+ Buffer = AllocatePages (EFI_SIZE_TO_PAGES (Size));
+ if (Buffer != NULL) {
+ ZeroMem (Buffer, Size);
+ }
+
+ return Buffer;
+}
+/**
Callback function executed when the EndOfDxe event group is signaled.
We delay allocating StartupVector and saving the MTRR settings until BDS signals EndOfDxe.
@@ -171,10 +194,7 @@ CpuS3DataInitialize (
//
OldAcpiCpuData = (ACPI_CPU_DATA *) (UINTN) PcdGet64 (PcdCpuS3DataAddress);
- //
- // Allocate ACPI NVS memory below 4G memory for use on ACPI S3 resume.
- //
- AcpiCpuDataEx = AllocateAcpiNvsMemoryBelow4G (sizeof (ACPI_CPU_DATA_EX));
+ AcpiCpuDataEx = AllocateZeroPages (sizeof (ACPI_CPU_DATA_EX));
ASSERT (AcpiCpuDataEx != NULL);
AcpiCpuData = &AcpiCpuDataEx->AcpiCpuData;
@@ -223,11 +243,11 @@ CpuS3DataInitialize (
AsmReadIdtr (&AcpiCpuDataEx->IdtrProfile);
//
- // Allocate GDT and IDT in ACPI NVS and copy current GDT and IDT contents
+ // Allocate GDT and IDT and copy current GDT and IDT contents
//
GdtSize = AcpiCpuDataEx->GdtrProfile.Limit + 1;
IdtSize = AcpiCpuDataEx->IdtrProfile.Limit + 1;
- Gdt = AllocateAcpiNvsMemoryBelow4G (GdtSize + IdtSize);
+ Gdt = AllocateZeroPages (GdtSize + IdtSize);
ASSERT (Gdt != NULL);
Idt = (VOID *)((UINTN)Gdt + GdtSize);
CopyMem (Gdt, (VOID *)AcpiCpuDataEx->GdtrProfile.Base, GdtSize);
@@ -243,7 +263,7 @@ CpuS3DataInitialize (
// Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs
//
TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE);
- RegisterTable = (CPU_REGISTER_TABLE *)AllocateAcpiNvsMemoryBelow4G (TableSize);
+ RegisterTable = (CPU_REGISTER_TABLE *)AllocateZeroPages (TableSize);
ASSERT (RegisterTable != NULL);
for (Index = 0; Index < NumberOfCpus; Index++) {
diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf b/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
index 480c98ebcd..c16731529c 100644
--- a/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
+++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
@@ -51,6 +51,7 @@
DebugLib
BaseLib
MtrrLib
+ MemoryAllocationLib
[Guids]
gEfiEndOfDxeEventGroupGuid ## CONSUMES ## Event