UefiCpuPkg/AcpiCpuData.h: Support >4GB MMIO address

The current CPU_REGISTER_TABLE_ENTRY structure only defined UINT32 Index to
indicate MSR/MMIO address. It's ok for MSR because MSR address is UINT32 type
actually. But for MMIO address, UINT32 limits MMIO address exceeds 4GB.

This update on CPU_REGISTER_TABLE_ENTRY is to add additional UINT32 field
HighIndex to indicate the high 32bit MMIO address and original Index still
indicate the low 32bit MMIO address.

This update makes use of original padding space between ValidBitLength and
Value to add HighIndex.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

1 files changed, 7 insertions, 5 deletions

diff --git a/UefiCpuPkg/Include/AcpiCpuData.h b/UefiCpuPkg/Include/AcpiCpuData.h
index 130eb90895..ec092074ce 100644
--- a/UefiCpuPkg/Include/AcpiCpuData.h
+++ b/UefiCpuPkg/Include/AcpiCpuData.h
@@ -29,11 +29,13 @@ typedef enum {
 // Element of register table entry

 //

 typedef struct {

-  REGISTER_TYPE  RegisterType;

-  UINT32         Index;

-  UINT8          ValidBitStart;

-  UINT8          ValidBitLength;

-  UINT64         Value;

+  REGISTER_TYPE  RegisterType;          // offset 0 - 3

+  UINT32         Index;                 // offset 4 - 7

+  UINT8          ValidBitStart;         // offset 8

+  UINT8          ValidBitLength;        // offset 9

+  UINT16         Reserved;              // offset 10 - 11

+  UINT32         HighIndex;             // offset 12-15, only valid for MemoryMapped

+  UINT64         Value;                 // offset 16-23

 } CPU_REGISTER_TABLE_ENTRY;

 

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