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authorHao Wu <hao.a.wu@intel.com>2016-12-20 09:42:53 +0800
committerHao Wu <hao.a.wu@intel.com>2016-12-20 09:58:13 +0800
commit3b4640ee56e06eea83db296d98210f99ff68310c (patch)
treed3649a00616b1d4a82a6a600452cc5efc87b2867 /UefiCpuPkg/Include/Register
parent83c6c3bfe293cd0a5983375dfbf46d4f364b38aa (diff)
downloadedk2-3b4640ee56e06eea83db296d98210f99ff68310c.tar.gz
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UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Diffstat (limited to 'UefiCpuPkg/Include/Register')
-rw-r--r--UefiCpuPkg/Include/Register/ArchitecturalMsr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
index 633e54d4e0..4f9c1033f3 100644
--- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
+++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
@@ -4014,7 +4014,7 @@ typedef union {
/// [Bit 14] If read as 1, Intel(R) Processor Trace (Intel PT) can be used
/// in VMX operation. If the processor supports Intel PT but does not allow
/// it to be used in VMX operation, execution of VMXON clears
- /// IA32_RTIT_CTL.TraceEn (see “VMXON—Enter VMX Operation” in Chapter 30);
+ /// IA32_RTIT_CTL.TraceEn (see "VMXON-Enter VMX Operation" in Chapter 30);
/// any attempt to set that bit while in VMX operation (including VMX root
/// operation) using the WRMSR instruction causes a general-protection
/// exception.