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| author | Eric Dong <eric.dong@intel.com> | 2018-09-14 08:54:46 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:14 +0800 |
| commit | 8b344785a3eb20aaf224816af845fe7aeff364e2 (patch) | |
| tree | 2662f4adb55eaae21b8a869100199beba39cbd82 /UefiCpuPkg/Include/Register | |
| parent | f49bbeda3ecaedf89b0190292980a84e80824a9b (diff) | |
| download | edk2-8b344785a3eb20aaf224816af845fe7aeff364e2.tar.gz edk2-8b344785a3eb20aaf224816af845fe7aeff364e2.tar.bz2 edk2-8b344785a3eb20aaf224816af845fe7aeff364e2.zip | |
UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one.
Changes includes:
1. Change MSR name:
1. MSR_SKYLAKE_SGXOWNER0 => MSR_SKYLAKE_SGXOWNEREPOCH0
2. MSR_SKYLAKE_SGXOWNER1 => MSR_SKYLAKE_SGXOWNEREPOCH1
2. Keep old MSR definition(MSR_SKYLAKE_SGXOWNER0/1) for compatibility
1. Use below coding style to define old MSR
#define MSR_SKYLAKE_SGXOWNER0 MSR_SKYLAKE_SGXOWNEREPOCH0
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/Include/Register')
| -rw-r--r-- | UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h | 40 |
1 files changed, 27 insertions, 13 deletions
diff --git a/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h b/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h index a85997f3e9..a24480015e 100644 --- a/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h +++ b/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h @@ -197,10 +197,12 @@ typedef union { /**
- Package. Lower 64 Bit OwnerEpoch Component of SGX Key (RO). Low 64 bits of
- an 128-bit external entropy value for key derivation of an enclave.
+ Package. Lower 64 Bit CR_SGXOWNEREPOCH (W) Writes do not update
+ CR_SGXOWNEREPOCH if CPUID.(EAX=12H, ECX=0):EAX.SGX1 is 1 on any thread in
+ the package. Lower 64 bits of an 128-bit external entropy value for key
+ derivation of an enclave.
- @param ECX MSR_SKYLAKE_SGXOWNER0 (0x00000300)
+ @param ECX MSR_SKYLAKE_SGXOWNEREPOCH0 (0x00000300)
@param EAX Lower 32-bits of MSR value.
@param EDX Upper 32-bits of MSR value.
@@ -208,18 +210,24 @@ typedef union { @code
UINT64 Msr;
- Msr = AsmReadMsr64 (MSR_SKYLAKE_SGXOWNER0);
+ Msr = 0;
+ AsmWriteMsr64 (MSR_SKYLAKE_SGXOWNEREPOCH0, Msr);
@endcode
- @note MSR_SKYLAKE_SGXOWNER0 is defined as MSR_SGXOWNER0 in SDM.
+ @note MSR_SKYLAKE_SGXOWNEREPOCH0 is defined as MSR_SGXOWNER0 in SDM.
**/
-#define MSR_SKYLAKE_SGXOWNER0 0x00000300
-
+#define MSR_SKYLAKE_SGXOWNEREPOCH0 0x00000300
+//
+// Define MSR_SKYLAKE_SGXOWNER0 for compatibility due to name change in the SDM.
+//
+#define MSR_SKYLAKE_SGXOWNER0 MSR_SKYLAKE_SGXOWNEREPOCH0
/**
- Package. Upper 64 Bit OwnerEpoch Component of SGX Key (RO). Upper 64 bits of
- an 128-bit external entropy value for key derivation of an enclave.
+ Package. Upper 64 Bit CR_SGXOWNEREPOCH (W) Writes do not update
+ CR_SGXOWNEREPOCH if CPUID.(EAX=12H, ECX=0):EAX.SGX1 is 1 on any thread in
+ the package. Upper 64 bits of an 128-bit external entropy value for key
+ derivation of an enclave.
- @param ECX MSR_SKYLAKE_SGXOWNER1 (0x00000301)
+ @param ECX MSR_SKYLAKE_SGXOWNEREPOCH1 (0x00000301)
@param EAX Lower 32-bits of MSR value.
@param EDX Upper 32-bits of MSR value.
@@ -227,11 +235,17 @@ typedef union { @code
UINT64 Msr;
- Msr = AsmReadMsr64 (MSR_SKYLAKE_SGXOWNER1);
+ Msr = 0;
+ AsmWriteMsr64 (MSR_SKYLAKE_SGXOWNEREPOCH1, Msr);
@endcode
- @note MSR_SKYLAKE_SGXOWNER1 is defined as MSR_SGXOWNER1 in SDM.
+ @note MSR_SKYLAKE_SGXOWNEREPOCH1 is defined as MSR_SGXOWNER1 in SDM.
**/
-#define MSR_SKYLAKE_SGXOWNER1 0x00000301
+#define MSR_SKYLAKE_SGXOWNEREPOCH1 0x00000301
+
+//
+// Define MSR_SKYLAKE_SGXOWNER1 for compatibility due to name change in the SDM.
+//
+#define MSR_SKYLAKE_SGXOWNER1 MSR_SKYLAKE_SGXOWNEREPOCH1
/**
|