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| author | Tom Lendacky <thomas.lendacky@amd.com> | 2020-11-06 11:53:03 -0600 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-11-10 19:07:55 +0000 |
| commit | 990ab937c20cd2674e3e2697729f4530dfbabb92 (patch) | |
| tree | 2bfc5a0cb7bf28ca9e5fb5c65cc43f1e646d2507 /UefiCpuPkg/Include | |
| parent | 8c610e6075f2a200400970698a810a57ad49220e (diff) | |
| download | edk2-990ab937c20cd2674e3e2697729f4530dfbabb92.tar.gz edk2-990ab937c20cd2674e3e2697729f4530dfbabb92.tar.bz2 edk2-990ab937c20cd2674e3e2697729f4530dfbabb92.zip | |
MdePkg: Clean up GHCB field offsets and save area
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008
Use OFFSET_OF () and sizeof () to calculate the GHCB register field
offsets instead of hardcoding the values in the GHCB_REGISTER enum.
Define only fields that are used per the GHCB specification, which will
result in removing some fields and adding others.
Also, remove the DR7 field from the GHCB_SAVE_AREA structure since it is
not used/defined in the GHCB specification and then rename the reserved
fields as appropriate.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <5e9245c7600b9b2d55dd7586b8df28b91b75b72b.1604685192.git.thomas.lendacky@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'UefiCpuPkg/Include')
0 files changed, 0 insertions, 0 deletions