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| author | Siyuan Fu <siyuan.fu@intel.com> | 2020-02-11 21:30:48 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-02-14 04:31:18 +0000 |
| commit | c788c2b1ade657e01a63001e8fee621001404af7 (patch) | |
| tree | 0c5376783cf05454937971adeb312aeb70762407 /UefiCpuPkg/Include | |
| parent | 534fcb84decdd613cc35309f24e7b792b1928809 (diff) | |
| download | edk2-c788c2b1ade657e01a63001e8fee621001404af7.tar.gz edk2-c788c2b1ade657e01a63001e8fee621001404af7.tar.bz2 edk2-c788c2b1ade657e01a63001e8fee621001404af7.zip | |
UefiCpuPkg: Remove FIT based microcode shadow logic from MpInitLib.
Commit c7c964b and dd01704 add header file for FIT table and update
MpInitLib to support FIT based microcode shadow operation. There are
comments that FIT is Intel specific specification instead of industry
standard, which should not be placed in EDK2 MdePkg and UefiCpuPkg.
So this patch adds a platform PPI for the microcode shadow logic, and
remove the FIT related code from EDK2.
The FIT based microcode shadow support will be implemented as a new
platform PEIM in IntelSiliconPkg in edk2-platforms.
This patch doesn't provide a DXE version shadow microcode protocol,
a platform which only uses DxeMpInitLib instance only supports PCD
based microcode shadowing.
A detailed design doc can be found here:
https://edk2.groups.io/g/devel/files/Designs/2020/0214/Support%20
the%202nd%20Microcode%20FV%20Flash%20Region.pdf
TEST: Tested on FIT enabled platform.
BZ: https://tianocore.acgmultimedia.com/show_bug.cgi?id=2449
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/Include')
| -rw-r--r-- | UefiCpuPkg/Include/Ppi/ShadowMicrocode.h | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Ppi/ShadowMicrocode.h b/UefiCpuPkg/Include/Ppi/ShadowMicrocode.h new file mode 100644 index 0000000000..be48965422 --- /dev/null +++ b/UefiCpuPkg/Include/Ppi/ShadowMicrocode.h @@ -0,0 +1,66 @@ +/** @file
+ This file declares EDKII Shadow Microcode PPI.
+
+ Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __PPI_SHADOW_MICROCODE_H__
+#define __PPI_SHADOW_MICROCODE_H__
+
+#define EDKII_PEI_SHADOW_MICROCODE_PPI_GUID \
+ { \
+ 0x430f6965, 0x9a69, 0x41c5, { 0x93, 0xed, 0x8b, 0xf0, 0x64, 0x35, 0xc1, 0xc6 } \
+ }
+
+typedef struct _EDKII_PEI_SHADOW_MICROCODE_PPI EDKII_PEI_SHADOW_MICROCODE_PPI;
+
+typedef struct {
+ UINT32 ProcessorSignature;
+ UINT8 PlatformId;
+} EDKII_PEI_MICROCODE_CPU_ID;
+
+/**
+ Shadow microcode update patches to memory.
+
+ The function is used for shadowing microcode update patches to a continuous memory.
+ It shall allocate memory buffer and only shadow the microcode patches for those
+ processors specified by MicrocodeCpuId array. The checksum verification may be
+ skiped in this function so the caller must perform checksum verification before
+ using the microcode patches in returned memory buffer.
+
+ @param[in] This The PPI instance pointer.
+ @param[in] CpuIdCount Number of elements in MicrocodeCpuId array.
+ @param[in] MicrocodeCpuId A pointer to an array of EDKII_PEI_MICROCODE_CPU_ID
+ structures.
+ @param[out] BufferSize Pointer to receive the total size of Buffer.
+ @param[out] Buffer Pointer to receive address of allocated memory
+ with microcode patches data in it.
+
+ @retval EFI_SUCCESS The microcode has been shadowed to memory.
+ @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_PEI_SHADOW_MICROCODE) (
+ IN EDKII_PEI_SHADOW_MICROCODE_PPI *This,
+ IN UINTN CpuIdCount,
+ IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId,
+ OUT UINTN *BufferSize,
+ OUT VOID **Buffer
+ );
+
+///
+/// This PPI is installed by some platform or chipset-specific PEIM that
+/// abstracts handling microcode shadow support.
+///
+struct _EDKII_PEI_SHADOW_MICROCODE_PPI {
+ EDKII_PEI_SHADOW_MICROCODE ShadowMicrocode;
+};
+
+extern EFI_GUID gEdkiiPeiShadowMicrocodePpiGuid;
+
+#endif
+
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