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| author | Lou, Yun <Yun.Lou@intel.com> | 2021-03-15 21:48:53 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-03-17 11:27:39 +0000 |
| commit | e4ff3773b711527ff46759759f34ea1cb9ff2a45 (patch) | |
| tree | e1643fb664bea5dd2fb62353d7cc1b25066fd956 /UefiCpuPkg/Include | |
| parent | 2e51b27fed31eb7b2a2cb4245806c8c7859207f7 (diff) | |
| download | edk2-e4ff3773b711527ff46759759f34ea1cb9ff2a45.tar.gz edk2-e4ff3773b711527ff46759759f34ea1cb9ff2a45.tar.bz2 edk2-e4ff3773b711527ff46759759f34ea1cb9ff2a45.zip | |
UefiCpuPkg/CpuCacheInfoLib: Collect cache associative type
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3265
Support collecting cache associative type in CpuCacheInfoLib.
This prevents the user from using additional code to obtain the
same information.
Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Diffstat (limited to 'UefiCpuPkg/Include')
| -rw-r--r-- | UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h index a7f29b1887..a66152bce0 100644 --- a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h +++ b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h @@ -1,7 +1,7 @@ /** @file
Header file for CPU Cache info Library.
- Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -33,7 +33,18 @@ typedef struct { // Ways of associativity.
// Value = CPUID.04h:EBX[31:22]
//
- UINT16 CacheWays;
+ UINT16 CacheWays : 10;
+ //
+ // Fully associative cache.
+ // Value = CPUID.04h:EAX[09]
+ //
+ UINT16 FullyAssociativeCache : 1;
+ //
+ // Direct mapped cache.
+ // Value = CPUID.04h:EDX[02]
+ //
+ UINT16 DirectMappedCache : 1;
+ UINT16 Reserved : 4;
//
// Size of single cache that this package's this type of logical processor corresponds to.
// Value = (CPUID.04h:EBX[31:22] + 1) * (CPUID.04h:EBX[21:12] + 1) *
|