diff options
| author | Eric Dong <eric.dong@intel.com> | 2018-10-17 09:24:05 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-10-22 11:19:49 +0800 |
| commit | d28daaddb3e732468e930a809d3d3943a5de9558 (patch) | |
| tree | 615dd8f0f37092b4514a144ad3ba4fcf95091e37 /UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c | |
| parent | 38381e18bf08dadad91627949996d106612f4753 (diff) | |
| download | edk2-d28daaddb3e732468e930a809d3d3943a5de9558.tar.gz edk2-d28daaddb3e732468e930a809d3d3943a5de9558.tar.bz2 edk2-d28daaddb3e732468e930a809d3d3943a5de9558.zip | |
UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.
Because MSR has scope attribute, driver has no needs to set
MSR for all APs if MSR scope is core or package type. This patch
updates code to base on the MSR scope value to add MSR to the register
table.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c')
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c index 1d43bd128a..530748bf46 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c @@ -67,6 +67,21 @@ MonitorMwaitInitialize ( IN BOOLEAN State
)
{
+ //
+ // The scope of the MSR_IA32_MISC_ENABLE is core for below processor type, only program
+ // MSR_IA32_MISC_ENABLE for thread 0 in each core.
+ //
+ if (IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
+ IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
+ IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
+ IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
+ IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
+ IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
+ if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
+ return RETURN_SUCCESS;
+ }
+ }
+
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,
Msr,
|