diff options
| author | Eric Dong <eric.dong@intel.com> | 2017-08-17 11:40:38 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2017-08-28 15:23:21 +0800 |
| commit | 306a5bcc6b0170d28b0db10bd359817bb4b1db9f (patch) | |
| tree | e8cd06bd4430c9337925e7fc3ec47107f0ef2721 /UefiCpuPkg/Library/CpuCommonFeaturesLib | |
| parent | ac401975581daf1e4e353898f7441eeb668ba304 (diff) | |
| download | edk2-306a5bcc6b0170d28b0db10bd359817bb4b1db9f.tar.gz edk2-306a5bcc6b0170d28b0db10bd359817bb4b1db9f.tar.bz2 edk2-306a5bcc6b0170d28b0db10bd359817bb4b1db9f.zip | |
UefiCpuPkg/CpuCommonFeaturesLib: Merge machine check code to same file.
Original code about Local Machine Check exception feature saves in a
discrete file, because features related to machine check architecture
all saved in MachineCheck.c file. This patch moved LMCE logic to same
file for easy maintenance.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg/Library/CpuCommonFeaturesLib')
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 | ||||
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 81 |
2 files changed, 81 insertions, 1 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf index 9fc3a9c86d..e9225bb96a 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -48,7 +48,6 @@ PendingBreak.c
X2Apic.c
Ppin.c
- Lmce.c
ProcTrace.c
[Packages]
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c index 72f665d32e..b012c6926e 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c @@ -229,3 +229,84 @@ McgCtlInitialize ( return RETURN_SUCCESS;
}
+/**
+ Detects if Local machine check exception feature supported on current
+ processor.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+
+ @retval TRUE Local machine check exception feature is supported.
+ @retval FALSE Local machine check exception feature is not supported.
+
+ @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData OPTIONAL
+ )
+{
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
+
+ if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
+ return FALSE;
+ }
+
+ McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+ if (ProcessorNumber == 0) {
+ DEBUG ((EFI_D_INFO, "LMCE eanble = %x\n", (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0)));
+ }
+ return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0);
+}
+
+/**
+ Initializes Local machine check exception feature to specific state.
+
+ @param[in] ProcessorNumber The index of the CPU executing this function.
+ @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+ structure for the CPU executing this function.
+ @param[in] ConfigData A pointer to the configuration buffer returned
+ by CPU_FEATURE_GET_CONFIG_DATA. NULL if
+ CPU_FEATURE_GET_CONFIG_DATA was not provided in
+ RegisterCpuFeature().
+ @param[in] State If TRUE, then the Local machine check exception
+ feature must be enabled.
+ If FALSE, then the Local machine check exception
+ feature must be disabled.
+
+ @retval RETURN_SUCCESS Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+ IN UINTN ProcessorNumber,
+ IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
+ IN VOID *ConfigData, OPTIONAL
+ IN BOOLEAN State
+ )
+{
+ MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
+
+ ASSERT (ConfigData != NULL);
+ MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
+ if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_FEATURE_CONTROL,
+ MSR_IA32_FEATURE_CONTROL_REGISTER,
+ Bits.LmceOn,
+ (State) ? 1 : 0
+ );
+ }
+ return RETURN_SUCCESS;
+}
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