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authorRuiyu Ni <ruiyu.ni@intel.com>2018-09-07 18:12:46 +0800
committerRuiyu Ni <ruiyu.ni@intel.com>2018-09-10 10:22:27 +0800
commit34c3405cb74c22a7d81b5aee65f0fc2a45c8dfae (patch)
treee129ade7d16b117e1eccfbd9477ca243636f746c /UefiCpuPkg/Library/CpuExceptionHandlerLib
parent3a3475331275bca190718557247a37b27b083a2a (diff)
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UefiCpuPkg/PeiCpuException: Fix coding style issue
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Diffstat (limited to 'UefiCpuPkg/Library/CpuExceptionHandlerLib')
-rw-r--r--UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
index 658f1087a2..292e89bed7 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
@@ -46,7 +46,7 @@ GetExceptionHandlerData (
AsmReadIdtr (&IdtDescriptor);
IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
-
+
Exception0StubHeader = (EXCEPTION0_STUB_HEADER *)ArchGetIdtHandler (&IdtTable[0]);
return Exception0StubHeader->ExceptionHandlerData;
}
@@ -58,7 +58,7 @@ GetExceptionHandlerData (
exception handler data. The new allocated memory layout follows structure EXCEPTION0_STUB_HEADER.
The code assumes that all processors uses the same exception handler for #0 exception.
- @param pointer to exception handler data.
+ @param ExceptionHandlerData pointer to exception handler data.
**/
VOID
SetExceptionHandlerData (
@@ -74,7 +74,7 @@ SetExceptionHandlerData (
//
AsmReadIdtr (&IdtDescriptor);
IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
-
+
Exception0StubHeader = AllocatePool (sizeof (*Exception0StubHeader));
ASSERT (Exception0StubHeader != NULL);
CopyMem (