UefiCpuPkg: Use public Architectural MSRs from MdePkg

Replaced local Msr defines with inclusion of Register/Amd/Msr.h in Amd
libraries.

Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>

5 files changed, 31 insertions, 24 deletions

diff --git a/UefiCpuPkg/Library/MmSaveStateLib/AmdMmSaveState.c b/UefiCpuPkg/Library/MmSaveStateLib/AmdMmSaveState.c
index f9485b7cd8..ac143e64fb 100644
--- a/UefiCpuPkg/Library/MmSaveStateLib/AmdMmSaveState.c
+++ b/UefiCpuPkg/Library/MmSaveStateLib/AmdMmSaveState.c
@@ -10,10 +10,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "MmSaveState.h"

 #include <Register/Amd/SmramSaveStateMap.h>

 #include <Library/BaseLib.h>

+#include <Register/Amd/Msr.h>

 

-// EFER register LMA bit

-#define LMA                                        BIT10

-#define EFER_ADDRESS                               0xC0000080ul

 #define AMD_MM_SAVE_STATE_REGISTER_SMMREVID_INDEX  1

 #define AMD_MM_SAVE_STATE_REGISTER_MAX_INDEX       2

 

@@ -280,6 +278,16 @@ MmSaveStateGetRegisterLma (
   VOID

   )

 {

+  UINT32  LMAValue;

+

+  MSR_IA32_EFER_REGISTER  Msr;

+

+  Msr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);

+  LMAValue   = Msr.Bits.LMA;

+  if (LMAValue) {

+    return EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;

+  }

+

   //

   // AMD64 processors support EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT only

   //

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c
index 561f578b01..dc7095c858 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c
@@ -17,15 +17,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/DebugLib.h>

 #include <Library/MmSaveStateLib.h>

 #include <Library/HobLib.h>

+#include <Register/Amd/Msr.h>

 

 // EFER register LMA bit

 #define LMA  BIT10

 

-// Machine Specific Registers (MSRs)

-#define SMMADDR_ADDRESS  0xC0010112ul

-#define SMMMASK_ADDRESS  0xC0010113ul

-#define EFER_ADDRESS     0XC0000080ul

-

 // The mode of the CPU at the time an SMI occurs

 STATIC UINT8  mSmmSaveStateRegisterLma;

 

@@ -105,6 +101,10 @@ SmmCpuFeaturesInitializeProcessor (
     CpuState->x64.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];

   }

 

+  // Re-initialize the value of mSmmSaveStateRegisterLma flag which might have been changed in PiCpuSmmDxeSmm Driver

+  // Entry point, to make sure correct value on AMD platform is assigned to be used by SmmCpuFeaturesLib.

+  mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT;

+

   //

   // If SMRR is supported, then program SMRR base/mask MSRs.

   // The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first normal SMI.

@@ -130,8 +130,8 @@ SmmCpuFeaturesInitializeProcessor (
         CpuDeadLoop ();

       }

     } else {

-      AsmWriteMsr64 (SMMADDR_ADDRESS, CpuHotPlugData->SmrrBase);

-      AsmWriteMsr64 (SMMMASK_ADDRESS, ((~(UINT64)(CpuHotPlugData->SmrrSize - 1)) | 0x6600));

+      AsmWriteMsr64 (AMD_64_SMM_ADDR, CpuHotPlugData->SmrrBase);

+      AsmWriteMsr64 (AMD_64_SMM_MASK, ((~(UINT64)(CpuHotPlugData->SmrrSize - 1)) | 0x6600));

     }

   }

 }

diff --git a/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
index 27d661445a..cbebad3d62 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
@@ -9,8 +9,6 @@
 #include "InternalSmmRelocationLib.h"

 #include <Register/Amd/SmramSaveStateMap.h>

 

-#define EFER_ADDRESS  0XC0000080ul

-

 /**

   Get the mode of the CPU at the time an SMI occurs

 

@@ -23,13 +21,14 @@ GetMmSaveStateRegisterLma (
   VOID

   )

 {

-  UINT8   SmmSaveStateRegisterLma;

-  UINT32  LMAValue;

+  UINT8                   SmmSaveStateRegisterLma;

+  MSR_IA32_EFER_REGISTER  Msr;

+

+  Msr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);

 

   SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT;

 

-  LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;

-  if (LMAValue) {

+  if (Msr.Bits.LMA) {

     SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;

   }

 

@@ -91,12 +90,14 @@ HookReturnFromSmm (
 {

   UINT64                    OriginalInstructionPointer;

   AMD_SMRAM_SAVE_STATE_MAP  *AmdCpuState;

+  MSR_IA32_EFER_REGISTER    Msr;

 

   AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;

 

   OriginalInstructionPointer = AmdCpuState->x64._RIP;

+  Msr.Uint64                 = AmdCpuState->x64.EFER;

 

-  if ((AmdCpuState->x64.EFER & LMA) == 0) {

+  if (!Msr.Bits.LMA) {

     AmdCpuState->x64._RIP = NewInstructionPointer32;

   } else {

     AmdCpuState->x64._RIP = NewInstructionPointer;

diff --git a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h b/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
index d1387f2dfb..dec2545f4f 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
+++ b/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
@@ -29,6 +29,7 @@
 #include <Guid/SmramMemoryReserve.h>

 #include <Guid/SmmBaseHob.h>

 #include <Register/Intel/Cpuid.h>

+#include <Register/Intel/Msr.h>

 #include <Register/Intel/SmramSaveStateMap.h>

 #include <Protocol/MmCpu.h>

 

@@ -51,11 +52,6 @@ X86_ASSEMBLY_PATCH_LABEL  gPatchSmmInitStack;
 

 #define CR4_CET_ENABLE  BIT23

 

-//

-// EFER register LMA bit

-//

-#define LMA  BIT10

-

 /**

   This function configures the SmBase on the currently executing CPU.

 

diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c b/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
index 76d798aba5..176da12b4b 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
@@ -102,7 +102,8 @@ HookReturnFromSmm (
   IN     UINT64                NewInstructionPointer

   )

 {

-  UINT64  OriginalInstructionPointer;

+  UINT64                  OriginalInstructionPointer;

+  MSR_IA32_EFER_REGISTER  Msr;

 

   if (GetMmSaveStateRegisterLma () == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) {

     OriginalInstructionPointer = (UINT64)CpuState->x86._EIP;

@@ -117,7 +118,8 @@ HookReturnFromSmm (
     }

   } else {

     OriginalInstructionPointer = CpuState->x64._RIP;

-    if ((CpuState->x64.IA32_EFER & LMA) == 0) {

+    Msr.Uint64                 = CpuState->x64.IA32_EFER;

+    if (!Msr.Bits.LMA) {

       CpuState->x64._RIP = (UINT32)NewInstructionPointer32;

     } else {

       CpuState->x64._RIP = (UINT32)NewInstructionPointer;