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author | Liming Gao <liming.gao@intel.com> | 2018-01-11 17:05:15 +0800 |
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committer | Liming Gao <liming.gao@intel.com> | 2018-01-16 23:43:08 +0800 |
commit | e21e355e2ca7fefb15b4df7078f995d3fb9c2b89 (patch) | |
tree | ec7a89e8a5550398b592234626609f155d96fd7d /UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | |
parent | 1c7a65eba749ff62e5ba425c5e40e23cfd1de245 (diff) | |
download | edk2-e21e355e2ca7fefb15b4df7078f995d3fb9c2b89.tar.gz edk2-e21e355e2ca7fefb15b4df7078f995d3fb9c2b89.tar.bz2 edk2-e21e355e2ca7fefb15b4df7078f995d3fb9c2b89.zip |
UefiCpuPkg: Update PiSmmCpuDxeSmm pass XCODE5 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=849
In V2, use "mov rax, strict qword 0" to replace the hard code db.
1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.
3. On MpFuncs.nasm, use ExchangeInfo to record InitializeFloatingPointUnits.
This way is same to MpInitLib.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c')
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 94e5ab2c0e..554629536a 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -1,7 +1,7 @@ /** @file
Code for Processor S3 restoration
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -14,6 +14,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include "PiSmmCpuDxeSmm.h"
+#pragma pack(1)
typedef struct {
UINTN Lock;
VOID *StackStart;
@@ -23,7 +24,9 @@ typedef struct { IA32_DESCRIPTOR IdtrProfile;
UINT32 BufferStart;
UINT32 Cr3;
+ UINTN InitializeFloatingPointUnitsAddress;
} MP_CPU_EXCHANGE_INFO;
+#pragma pack()
typedef struct {
UINT8 *RendezvousFunnelAddress;
@@ -456,6 +459,7 @@ PrepareApStartupVector ( mExchangeInfo->StackSize = mAcpiCpuData.StackSize;
mExchangeInfo->BufferStart = (UINT32) StartupVector;
mExchangeInfo->Cr3 = (UINT32) (AsmReadCr3 ());
+ mExchangeInfo->InitializeFloatingPointUnitsAddress = (UINTN)InitializeFloatingPointUnits;
}
/**
|