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authorJeff Fan <jeff.fan@intel.com>2016-11-10 13:40:12 +0800
committerJeff Fan <jeff.fan@intel.com>2016-11-15 09:44:53 +0800
commit4a0f88dd6458528fc24ad320a05105150c9fb3bb (patch)
treed9ec40a0673565249c869124d65fd1cae0c6c502 /UefiCpuPkg/PiSmmCpuDxeSmm/Ia32
parentc37dcee6d8c24cff4c50fa5dd139e5a26678eb62 (diff)
downloadedk2-4a0f88dd6458528fc24ad320a05105150c9fb3bb.tar.gz
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UefiCpuPkg/PiSmmCpuDxeSmm: Put AP into safe hlt-loop code on S3 path
On S3 path, we will wake up APs to restore CPU context in PiSmmCpuDxeSmm driver. However, we place AP in hlt-loop under 1MB space borrowed after CPU restoring CPU contexts. In case, one NMI or SMI happens, APs may exit from hlt state and execute the instruction after HLT instruction. But the code under 1MB is no longer safe at that time. This fix is to allocate one ACPI NVS range to place the AP hlt-loop code. When CPU finished restoration CPU contexts, AP will execute in this ACPI NVS range. https://bugzilla.tianocore.org/show_bug.cgi?id=216 v2: 1. Make stack alignment per Laszlo's comment. 2. Trim whitespace at end of end. 3. Update year mark in file header. Reported-by: Laszlo Ersek <lersek@redhat.com> Analyzed-by: Paolo Bonzini <pbonzini@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/Ia32')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c27
1 files changed, 26 insertions, 1 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
index 545b534f27..8b880d6ab7 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
@@ -1,7 +1,7 @@
/** @file
SMM CPU misc functions for Ia32 arch specific.
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -94,3 +94,28 @@ InitGdt (
*GdtStepSize = GdtTableStepSize;
return GdtTssTables;
}
+
+/**
+ Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
+
+ @param[in] ApHltLoopCode The 32-bit address of the safe hlt-loop function.
+ @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
+
+**/
+VOID
+TransferApToSafeState (
+ IN UINT32 ApHltLoopCode,
+ IN UINT32 TopOfStack
+ )
+{
+ SwitchStack (
+ (SWITCH_STACK_ENTRY_POINT) (UINTN) ApHltLoopCode,
+ NULL,
+ NULL,
+ (VOID *) (UINTN) TopOfStack
+ );
+ //
+ // It should never reach here
+ //
+ ASSERT (FALSE);
+}