UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.

Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.

Patch6 - Removed Global Cr2 instead used function parameter.

Patch7 - Removed checking Cr2 with 0 as per feedback.

Patch8 and 9 - Aligned with EDK2 Coding style.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K <narendra.k.vanguput@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

1 files changed, 6 insertions, 3 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..ce70f77709 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1112,9 +1112,11 @@ SmiRendezvous (
   ASSERT(CpuIndex < mMaxNumberOfCpus);

 

   //

-  // Save Cr2 because Page Fault exception in SMM may override its value

+  // Save Cr2 because Page Fault exception in SMM may override its value,

+  // when using on-demand paging for above 4G memory.

   //

-  Cr2 = AsmReadCr2 ();

+  Cr2 = 0;

+  SaveCr2 (&Cr2);

 

   //

   // Perform CPU specific entry hooks

@@ -1253,10 +1255,11 @@ SmiRendezvous (
 

 Exit:

   SmmCpuFeaturesRendezvousExit (CpuIndex);

+

   //

   // Restore Cr2

   //

-  AsmWriteCr2 (Cr2);

+  RestoreCr2 (Cr2);

 }

 

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