diff options
| author | Jeff Fan <jeff.fan@intel.com> | 2016-04-08 13:55:14 +0800 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-05-16 10:40:19 -0700 |
| commit | f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb (patch) | |
| tree | cf3df079cbe6a3b8084a9d1cbb343cac4d2d50e5 /UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | |
| parent | 846704334c4083b8e86e921d3ffcbf7d886fe5b9 (diff) | |
| download | edk2-f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb.tar.gz edk2-f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb.tar.bz2 edk2-f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: Use public MSR_IA32_MISC_ENABLE definition
Use the MSR MSR_IA32_MISC_ENABLE definition defined in UefiCpuPkg/Include and
remove the local definition.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c index 8ecc5415a3..f9cea55d9d 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c @@ -934,8 +934,9 @@ CheckFeatureSupported ( IN OUT VOID *Buffer
)
{
- UINT32 RegEax;
- UINT32 RegEdx;
+ UINT32 RegEax;
+ UINT32 RegEdx;
+ MSR_IA32_MISC_ENABLE_REGISTER MiscEnableMsr;
if (mXdSupported) {
AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
@@ -966,9 +967,10 @@ CheckFeatureSupported ( // BTINT bits in the MSR_DEBUGCTLA MSR.
// 2. The IA32_DS_AREA MSR can be programmed to point to the DS save area.
//
- if (AsmMsrBitFieldRead64 (MSR_IA32_MISC_ENABLE, 11, 11) == 1) {
+ MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
+ if (MiscEnableMsr.Bits.BTS == 1) {
//
- // BTS facilities is not supported if MSR_IA32_MISC_ENABLE BIT11 is set.
+ // BTS facilities is not supported if MSR_IA32_MISC_ENABLE.BTS bit is set.
//
mBtsSupported = FALSE;
}
|