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| author | Jordan Justen <jordan.l.justen@intel.com> | 2014-08-18 23:03:46 +0000 |
|---|---|---|
| committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-18 23:03:46 +0000 |
| commit | eee1d2ca9078742157c843562f1188eb96473322 (patch) | |
| tree | 7609cb1cb555df09eb50a6a116e694a83421b55d /UefiCpuPkg/ResetVector/Vtf0/X64 | |
| parent | 5a1f324d946cb1be2dc1226752b1965d6633232f (diff) | |
| download | edk2-eee1d2ca9078742157c843562f1188eb96473322.tar.gz edk2-eee1d2ca9078742157c843562f1188eb96473322.tar.bz2 edk2-eee1d2ca9078742157c843562f1188eb96473322.zip | |
UefiCpuPkg VTF0 X64: Build page tables in NASM code
Previously, we would build the page tables in
Tools/FixupForRawSection.py.
In order to let NASM build VTF0 from source during the EDK II build
process, we need to move this into the VTF0 NASM code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15822 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg/ResetVector/Vtf0/X64')
| -rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm new file mode 100644 index 0000000000..3d703c74f6 --- /dev/null +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm @@ -0,0 +1,78 @@ +;------------------------------------------------------------------------------
+; @file
+; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB)
+;
+; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+BITS 64
+
+%define ALIGN_TOP_TO_4K_FOR_PAGING
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_PAT 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_MBO 0x080
+%define PAGE_2M_PAT 0x01000
+
+%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+ PAGE_ACCESSED + \
+ PAGE_DIRTY + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
+%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
+
+%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
+ PAGE_PDP_ATTR)
+%define PTE_2MB(x) ((x << 21) + PAGE_2M_PDE_ATTR)
+
+TopLevelPageDirectory:
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ DQ PDP(0x1000)
+
+
+ ;
+ ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
+ ;
+ TIMES 0x1000-PGTBLS_OFFSET($) DB 0
+
+ DQ PDP(0x2000)
+ DQ PDP(0x3000)
+ DQ PDP(0x4000)
+ DQ PDP(0x5000)
+
+ ;
+ ; Page Table Entries (2048 * 2MB entries => 4GB)
+ ;
+ TIMES 0x2000-PGTBLS_OFFSET($) DB 0
+
+%assign i 0
+%rep 0x800
+ DQ PTE_2MB(i)
+ %assign i i+1
+%endrep
+
+EndOfPageTables:
|