UefiCpuPkg/ResetVector: Remove AP waking vector from ResetVector

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494

Current reset vector uses 0xffffffe0 as AP waking vector, and expects
GenFv generates code aligned on a 4k boundary which will jump to this
location. However, some issues are listed below
1. GenFV doesn't generate code as the comment expects, because GenFv
assumes no modifications are required to the VTF-0 'Volume Top File'.
2. Even if removing VFT0 signature and let GenFv to modify, Genfv is
hard-code using another flash address 0xffffffd0.
3. In the same patch series, AP waking vector code is removed from
GenFv, because no such usage anymore. The existing of first two issues
also approve the usage is not available for a long time.

Therefore, remove AP waking vector related code.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>

2 files changed, 3 insertions, 19 deletions

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm
index cbdadee166..02b9a0303c 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm
@@ -18,13 +18,6 @@ EarlyBspInitReal16:
     jmp     short Main16

 

 ;

-; @param[out] DI    'AP' to indicate application processor

-;

-EarlyApInitReal16:

-    mov     di, 'AP'

-    jmp     short Main16

-

-;

 ; Modified:  EAX

 ;

 ; @param[in]  EAX   Initial value of the EAX register (BIST: Built-in Self Test)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
index fe5bbea803..384b1d4d98 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
@@ -32,22 +32,13 @@ ALIGN   16
     TIMES (0x1000 - 0x20) DB 0

 %endif

 

-applicationProcessorEntryPoint:

 ;

-; Application Processors entry point

+; 0xffffffe0

 ;

-; GenFv generates code aligned on a 4k boundary which will jump to this

-; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be

-; used to wake up the application processors.

-;

-    jmp     EarlyApInitReal16

-

-ALIGN   8

-

-    DD      0

+    DD      0, 0, 0

 

 ;

-; The VTF signature

+; The VTF signature (0xffffffec)

 ;

 ; VTF-0 means that the VTF (Volume Top File) code does not require

 ; any fixups.