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author | Zhiguang Liu <zhiguang.liu@intel.com> | 2023-07-07 13:07:29 +0800 |
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committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-09-18 02:39:25 +0000 |
commit | 392456240aa74966ee857ae1e5628943ee8c1b88 (patch) | |
tree | a5151c9639b0b55a5e042b9c6f069118e32587e5 /UefiCpuPkg/SecCore | |
parent | 29cce3356aec6db878ad318c4abeb63aa9e845aa (diff) | |
download | edk2-392456240aa74966ee857ae1e5628943ee8c1b88.tar.gz edk2-392456240aa74966ee857ae1e5628943ee8c1b88.tar.bz2 edk2-392456240aa74966ee857ae1e5628943ee8c1b88.zip |
BaseTools: Remove logic to create AP waking vector in GenFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494
Today for SEC core(not VTF-0), GenFv finds free 4K aligned space in
FV for AP waking vector and JMP to 4G-30h in the waking vector.
There is no usage of this today. Remove the logic to avoid confusing
and save spaces in reset vector.
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Diffstat (limited to 'UefiCpuPkg/SecCore')
0 files changed, 0 insertions, 0 deletions