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| author | Eric Dong <eric.dong@intel.com> | 2018-09-14 08:59:27 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:15 +0800 |
| commit | 140d713175f8a6176e67f179fc31b540461d81e5 (patch) | |
| tree | bcd42335ed07ba3b4e5d0cd68eb1c2183c0c103e /UefiCpuPkg | |
| parent | 8b344785a3eb20aaf224816af845fe7aeff364e2 (diff) | |
| download | edk2-140d713175f8a6176e67f179fc31b540461d81e5.tar.gz edk2-140d713175f8a6176e67f179fc31b540461d81e5.tar.bz2 edk2-140d713175f8a6176e67f179fc31b540461d81e5.zip | |
UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.
Changes includes:
1. Change MSR name:
1. MSR_GOLDMONT_SGXOWNER0 => MSR_GOLDMONT_SGXOWNEREPOCH0
2. MSR_GOLDMONT_SGXOWNER1 => MSR_GOLDMONT_SGXOWNEREPOCH1
2. Keep old MSR definition (MSR_GOLDMONT_SGXOWNER0/1) for compatibility.
1. Define old MSR like below style:
#define MSR_GOLDMONT_SGXOWNER0 MSR_GOLDMONT_SGXOWNEREPOCH0
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h | 34 |
1 files changed, 24 insertions, 10 deletions
diff --git a/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h b/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h index a9061133c9..383f31ee55 100644 --- a/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h +++ b/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h @@ -843,10 +843,12 @@ typedef union { /**
- Package. Lower 64 Bit OwnerEpoch Component of SGX Key (RO). Low 64 bits of
- an 128-bit external entropy value for key derivation of an enclave.
+ Package. Lower 64 Bit CR_SGXOWNEREPOCH (W) Writes do not update
+ CR_SGXOWNEREPOCH if CPUID.(EAX=12H, ECX=0):EAX.SGX1 is 1 on any thread in
+ the package. Lower 64 bits of an 128-bit external entropy value for key
+ derivation of an enclave.
- @param ECX MSR_GOLDMONT_SGXOWNER0 (0x00000300)
+ @param ECX MSR_GOLDMONT_SGXOWNEREPOCH0 (0x00000300)
@param EAX Lower 32-bits of MSR value.
@param EDX Upper 32-bits of MSR value.
@@ -854,18 +856,24 @@ typedef union { @code
UINT64 Msr;
- Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNER0);
+ Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNEREPOCH0);
@endcode
- @note MSR_GOLDMONT_SGXOWNER0 is defined as MSR_SGXOWNER0 in SDM.
+ @note MSR_GOLDMONT_SGXOWNEREPOCH0 is defined as MSR_SGXOWNEREPOCH0 in SDM.
**/
-#define MSR_GOLDMONT_SGXOWNER0 0x00000300
+#define MSR_GOLDMONT_SGXOWNEREPOCH0 0x00000300
+
+
+//
+// Define MSR_GOLDMONT_SGXOWNER0 for compatibility due to name change in the SDM.
+//
+#define MSR_GOLDMONT_SGXOWNER0 MSR_GOLDMONT_SGXOWNEREPOCH0
/**
Package. Upper 64 Bit OwnerEpoch Component of SGX Key (RO). Upper 64 bits of
an 128-bit external entropy value for key derivation of an enclave.
- @param ECX MSR_GOLDMONT_SGXOWNER1 (0x00000301)
+ @param ECX MSR_GOLDMONT_SGXOWNEREPOCH1 (0x00000301)
@param EAX Lower 32-bits of MSR value.
@param EDX Upper 32-bits of MSR value.
@@ -873,11 +881,17 @@ typedef union { @code
UINT64 Msr;
- Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNER1);
+ Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNEREPOCH1);
@endcode
- @note MSR_GOLDMONT_SGXOWNER1 is defined as MSR_SGXOWNER1 in SDM.
+ @note MSR_GOLDMONT_SGXOWNEREPOCH1 is defined as MSR_SGXOWNEREPOCH1 in SDM.
**/
-#define MSR_GOLDMONT_SGXOWNER1 0x00000301
+#define MSR_GOLDMONT_SGXOWNEREPOCH1 0x00000301
+
+
+//
+// Define MSR_GOLDMONT_SGXOWNER1 for compatibility due to name change in the SDM.
+//
+#define MSR_GOLDMONT_SGXOWNER1 MSR_GOLDMONT_SGXOWNEREPOCH1
/**
|