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| author | Ruiyu Ni <ruiyu.ni@intel.com> | 2018-11-06 17:04:39 +0800 |
|---|---|---|
| committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2018-11-07 17:05:49 +0800 |
| commit | 1ed6498c4a0210204bf4b95cc0c0cd6623ad6a0b (patch) | |
| tree | fa99ca006621a77cb57bfec65a3d7bb9d6b9dc15 /UefiCpuPkg | |
| parent | 328409ce8de7f318ee9c929b64302bd361cd1dbd (diff) | |
| download | edk2-1ed6498c4a0210204bf4b95cc0c0cd6623ad6a0b.tar.gz edk2-1ed6498c4a0210204bf4b95cc0c0cd6623ad6a0b.tar.bz2 edk2-1ed6498c4a0210204bf4b95cc0c0cd6623ad6a0b.zip | |
UefiCpuPkg/CommonFeature: Skip locking when the feature is disabled
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1305
Today's code unconditionally sets the IA32_FEATURE_CONTROL.Lock to 1
no matter the feature is enabled or not.
The patch fixes this issue by only setting the Lock bit to 1 when
the feature is enabled.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c index 8c1eb5eb4f..631c836857 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c @@ -1,7 +1,7 @@ /** @file
Features in MSR_IA32_FEATURE_CONTROL register.
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -185,6 +185,15 @@ LockFeatureControlRegisterInitialize ( MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
//
+ // When Lock Feature Control Register feature is disabled,
+ // just skip the MSR lock bit setting.
+ // The MSR lock bit is cleared by default and write-once in a boot.
+ //
+ if (!State) {
+ return RETURN_SUCCESS;
+ }
+
+ //
// The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for
// below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each
// core.
|