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authorLendacky, Thomas <thomas.lendacky@amd.com>2020-05-07 08:06:50 -0500
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-05-11 19:25:33 +0000
commit9378310dd877b99be1da398f39e82e0501aca372 (patch)
tree7596fa3b7ba5b9c6fde9ae342604f4ebc8565cef /UefiCpuPkg
parentb304d2807bb6da59314f6bc56843ff86ce054b75 (diff)
downloadedk2-9378310dd877b99be1da398f39e82e0501aca372.tar.gz
edk2-9378310dd877b99be1da398f39e82e0501aca372.tar.bz2
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UefiCpuPkg/CpuExceptionHandler: Revert CpuExceptionHandler binary patching
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340 Now that an XCODE5 specific CpuExceptionHandlerLib library is in place, revert the changes made to the ExceptionHandlerAsm.nasm in commit 2db0ccc2d7fe ("UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain") so that binary patching of flash code is not performed. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Liming Gao <liming.gao@intel.com> Acked-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <810f67d8604c054c09d17a22f0bcfaeb41ee8e3b.1588856809.git.thomas.lendacky@amd.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm25
1 files changed, 6 insertions, 19 deletions
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
index 19198f2731..3814f9de37 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
@@ -34,7 +34,7 @@ AsmIdtVectorBegin:
db 0x6a ; push #VectorNum
db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
push rax
- mov rax, strict qword 0 ; mov rax, ASM_PFX(CommonInterruptEntry)
+ mov rax, ASM_PFX(CommonInterruptEntry)
jmp rax
%endrep
AsmIdtVectorEnd:
@@ -44,8 +44,7 @@ HookAfterStubHeaderBegin:
@VectorNum:
db 0 ; 0 will be fixed
push rax
- mov rax, strict qword 0 ; mov rax, HookAfterStubHeaderEnd
-JmpAbsoluteAddress:
+ mov rax, HookAfterStubHeaderEnd
jmp rax
HookAfterStubHeaderEnd:
mov rax, rsp
@@ -257,7 +256,8 @@ HasErrorCode:
; and make sure RSP is 16-byte aligned
;
sub rsp, 4 * 8 + 8
- call ASM_PFX(CommonExceptionHandler)
+ mov rax, ASM_PFX(CommonExceptionHandler)
+ call rax
add rsp, 4 * 8 + 8
cli
@@ -365,24 +365,11 @@ DoIret:
; comments here for definition of address map
global ASM_PFX(AsmGetTemplateAddressMap)
ASM_PFX(AsmGetTemplateAddressMap):
- lea rax, [AsmIdtVectorBegin]
+ mov rax, AsmIdtVectorBegin
mov qword [rcx], rax
mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
- lea rax, [HookAfterStubHeaderBegin]
+ mov rax, HookAfterStubHeaderBegin
mov qword [rcx + 0x10], rax
-
-; Fix up CommonInterruptEntry address
- lea rax, [ASM_PFX(CommonInterruptEntry)]
- lea rcx, [AsmIdtVectorBegin]
-%rep 32
- mov qword [rcx + (JmpAbsoluteAddress - 8 - HookAfterStubHeaderBegin)], rax
- add rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
-%endrep
-; Fix up HookAfterStubHeaderEnd
- lea rax, [HookAfterStubHeaderEnd]
- lea rcx, [JmpAbsoluteAddress]
- mov qword [rcx - 8], rax
-
ret
;-------------------------------------------------------------------------------------