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author | Wu, Jiaxin <jiaxin.wu@intel.com> | 2023-11-15 19:15:51 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-12-08 13:25:11 +0000 |
commit | ad0b1cc144b56fcbd8d369eaff6eaf5f3020efe7 (patch) | |
tree | fbec8835f8a3d8b03470c85d2d7b8f6cf39469cb /UefiCpuPkg | |
parent | fe2abc9b74b9b869e29f0ebc6dfaa54001b53e9b (diff) | |
download | edk2-ad0b1cc144b56fcbd8d369eaff6eaf5f3020efe7.tar.gz edk2-ad0b1cc144b56fcbd8d369eaff6eaf5f3020efe7.tar.bz2 edk2-ad0b1cc144b56fcbd8d369eaff6eaf5f3020efe7.zip |
UefiCpuPkg/BaseXApicLib: Fix CPUID_V2_EXTENDED_TOPOLOGY detection
This patch is to complete 170d4ce8, sync the change to BaseXApicLib.
Checking the max cpuid leaf is not enough to figure whenever
CPUID_V2_EXTENDED_TOPOLOGY is supported. Intel SDM says:
Software must detect the presence of CPUID leaf 1FH by verifying
(a) the highest leaf index supported by CPUID is >= 1FH, and
(b) CPUID.1FH:EBX[15:0] reports a non-zero value.
The same is true for CPUID leaf 0BH.
This patch adds the EBX check to GetProcessorLocation2ByApicId(). The
patch also fixes the existing check in GetProcessorLocationByApicId() to
be in line with the spec by looking at bits 15:0. The comments are
updated with a quote from the Intel SDM.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Message-Id: <20231115111553.6592-2-jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r-- | UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c index d56c6275cc..efb9d71ca1 100644 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c @@ -1055,11 +1055,12 @@ GetProcessorLocationByApicId ( NULL
);
//
- // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for
- // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not
- // supported on that processor.
+ // Quoting Intel SDM:
+ // Software must detect the presence of CPUID leaf 0BH by
+ // verifying (a) the highest leaf index supported by CPUID is >=
+ // 0BH, and (b) CPUID.0BH:EBX[15:0] reports a non-zero value.
//
- if (ExtendedTopologyEbx.Uint32 != 0) {
+ if (ExtendedTopologyEbx.Bits.LogicalProcessors != 0) {
TopologyLeafSupported = TRUE;
//
@@ -1185,6 +1186,7 @@ GetProcessorLocation2ByApicId ( )
{
CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax;
+ CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx;
CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx;
UINT32 MaxStandardCpuIdIndex;
UINT32 Index;
@@ -1197,10 +1199,19 @@ GetProcessorLocation2ByApicId ( }
//
- // Get max index of CPUID
+ // Quoting Intel SDM:
+ // Software must detect the presence of CPUID leaf 1FH by verifying
+ // (a) the highest leaf index supported by CPUID is >= 1FH, and (b)
+ // CPUID.1FH:EBX[15:0] reports a non-zero value.
//
AsmCpuid (CPUID_SIGNATURE, &MaxStandardCpuIdIndex, NULL, NULL, NULL);
if (MaxStandardCpuIdIndex < CPUID_V2_EXTENDED_TOPOLOGY) {
+ ExtendedTopologyEbx.Bits.LogicalProcessors = 0;
+ } else {
+ AsmCpuidEx (CPUID_V2_EXTENDED_TOPOLOGY, 0, NULL, &ExtendedTopologyEbx.Uint32, NULL, NULL);
+ }
+
+ if (ExtendedTopologyEbx.Bits.LogicalProcessors == 0) {
if (Die != NULL) {
*Die = 0;
}
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