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| author | Michael D Kinney <michael.d.kinney@intel.com> | 2017-08-16 16:49:17 -0700 |
|---|---|---|
| committer | Michael D Kinney <michael.d.kinney@intel.com> | 2017-08-17 10:49:50 -0700 |
| commit | ba40cb31b69df76a3392219a78cbd7b49ae24c49 (patch) | |
| tree | b54381583d65625e6f7f39d9cb4e83150bbb74d5 /UefiCpuPkg | |
| parent | 3a424c5f49239b810e08aa23368945a9f0360d4c (diff) | |
| download | edk2-ba40cb31b69df76a3392219a78cbd7b49ae24c49.tar.gz edk2-ba40cb31b69df76a3392219a78cbd7b49ae24c49.tar.bz2 edk2-ba40cb31b69df76a3392219a78cbd7b49ae24c49.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: Add CPUID MCA support check
https://bugzilla.tianocore.org/show_bug.cgi?id=674
Add CPUID check to see if the CPU supports the Machine
Check Architecture before accessing the Machine Check
Architecture related MSRs.
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 6b66c49085..f086b97c30 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -27,6 +27,7 @@ SMM_CPU_SEMAPHORES mSmmCpuSemaphores; UINTN mSemaphoreSize;
SPIN_LOCK *mPFLock = NULL;
SMM_CPU_SYNC_MODE mCpuSmmSyncMode;
+BOOLEAN mMachineCheckSupported = FALSE;
/**
Performs an atomic compare exchange operation to get semaphore.
@@ -264,8 +265,12 @@ SmmWaitForApArrival ( ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
- LmceEn = IsLmceOsEnabled ();
- LmceSignal = IsLmceSignaled();
+ LmceEn = FALSE;
+ LmceSignal = FALSE;
+ if (mMachineCheckSupported) {
+ LmceEn = IsLmceOsEnabled ();
+ LmceSignal = IsLmceSignaled();
+ }
//
// Platform implementor should choose a timeout value appropriately:
@@ -1366,6 +1371,13 @@ InitializeMpServiceData ( UINTN Index;
UINT8 *GdtTssTables;
UINTN GdtTableStepSize;
+ CPUID_VERSION_INFO_EDX RegEdx;
+
+ //
+ // Determine if this CPU supports machine check
+ //
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx.Uint32);
+ mMachineCheckSupported = (BOOLEAN)(RegEdx.Bits.MCA == 1);
//
// Allocate memory for all locks and semaphores
|