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authorJiaxin Wu <jiaxin.wu@intel.com>2024-09-02 13:51:09 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-09-06 08:41:49 +0000
commitf6eb069e1719a6203814846bd953d85518bc4f21 (patch)
treefd675978cc85027be163c99ef955e0ae7f38e334 /UefiCpuPkg
parentc8ce84d06785ee7e7a3e1a8ab7c0af42ccbe3aa8 (diff)
downloadedk2-f6eb069e1719a6203814846bd953d85518bc4f21.tar.gz
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UefiCpuPkg/PiSmmCpuDxeSmm: Deadloop if PFAddr is not supported by system
Deadloop if PFAddr is not supported by system, no need check SMM CPU RestrictedMemory access enable or not. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index d561dc1966..fb1f237c12 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -726,7 +726,7 @@ SmiPFHandler (
PFAddress = AsmReadCr2 ();
- if (mCpuSmmRestrictedMemoryAccess && (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1)))) {
+ if (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1))) {
DumpCpuContext (InterruptType, SystemContext);
DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", PFAddress));
CpuDeadLoop ();