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| author | Guo Dong <guo.dong@intel.com> | 2021-09-22 14:27:21 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-10-25 17:28:21 +0000 |
| commit | bed990aae6b68b7fcadedb81075ae9619e12c1e6 (patch) | |
| tree | 557bedc1e6d7e51077db1cfb364f45e3b99c5f72 /UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h | |
| parent | e7e8ea27d4d8790e76c26fa150e85b3277a72fd5 (diff) | |
| download | edk2-bed990aae6b68b7fcadedb81075ae9619e12c1e6.tar.gz edk2-bed990aae6b68b7fcadedb81075ae9619e12c1e6.tar.bz2 edk2-bed990aae6b68b7fcadedb81075ae9619e12c1e6.zip | |
UefiPayloadPkg: Add bootloader SMM support module
This module is only used for SMM S3 support for the bootloader that
doesn't support SMM.
The payload would save SMM rebase info to SMM communication area in
normal boot and expect the bootloader in S3 path to rebase the SMM
and trigger SMI by writing 0xB2 port with the given value from SMM
communication area. The payload SMM handler would get chance to
restore some registers in S3 path.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
Diffstat (limited to 'UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h')
| -rw-r--r-- | UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h b/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h new file mode 100644 index 0000000000..f4386cb842 --- /dev/null +++ b/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h @@ -0,0 +1,41 @@ +/** @file
+ The header file of bootloader support SMM.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef BL_SUPPORT_SMM_H_
+#define BL_SUPPORT_SMM_H_
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/HobLib.h>
+#include <Library/MtrrLib.h>
+#include <Library/UefiLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/SmmServicesTableLib.h>
+#include <Library/PciLib.h>
+#include <Protocol/SmmSwDispatch2.h>
+#include <Protocol/SmmAccess2.h>
+#include <protocol/MpService.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Register/Intel/ArchitecturalMsr.h>
+#include <Guid/SmmRegisterInfoGuid.h>
+#include <Guid/SmmS3CommunicationInfoGuid.h>
+#include <Guid/SmramMemoryReserve.h>
+
+#define EFI_MSR_SMRR_MASK 0xFFFFF000
+#define MSR_SMM_FEATURE_CONTROL 0x4E0
+#define SMRAM_SAVE_STATE_MAP_OFFSET 0xFC00 /// Save state offset from SMBASE
+
+typedef struct {
+ UINT32 Base;
+ UINT32 Mask;
+} SMRR_BASE_MASK;
+
+#endif
+
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