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| author | Guo Dong <guo.dong@intel.com> | 2021-09-22 14:27:21 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-10-25 17:28:21 +0000 |
| commit | bed990aae6b68b7fcadedb81075ae9619e12c1e6 (patch) | |
| tree | 557bedc1e6d7e51077db1cfb364f45e3b99c5f72 /UefiPayloadPkg/Include | |
| parent | e7e8ea27d4d8790e76c26fa150e85b3277a72fd5 (diff) | |
| download | edk2-bed990aae6b68b7fcadedb81075ae9619e12c1e6.tar.gz edk2-bed990aae6b68b7fcadedb81075ae9619e12c1e6.tar.bz2 edk2-bed990aae6b68b7fcadedb81075ae9619e12c1e6.zip | |
UefiPayloadPkg: Add bootloader SMM support module
This module is only used for SMM S3 support for the bootloader that
doesn't support SMM.
The payload would save SMM rebase info to SMM communication area in
normal boot and expect the bootloader in S3 path to rebase the SMM
and trigger SMI by writing 0xB2 port with the given value from SMM
communication area. The payload SMM handler would get chance to
restore some registers in S3 path.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
Diffstat (limited to 'UefiPayloadPkg/Include')
| -rw-r--r-- | UefiPayloadPkg/Include/Guid/SmmS3CommunicationInfoGuid.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/UefiPayloadPkg/Include/Guid/SmmS3CommunicationInfoGuid.h b/UefiPayloadPkg/Include/Guid/SmmS3CommunicationInfoGuid.h new file mode 100644 index 0000000000..ee621b25f4 --- /dev/null +++ b/UefiPayloadPkg/Include/Guid/SmmS3CommunicationInfoGuid.h @@ -0,0 +1,54 @@ +/** @file
+ This file defines the SMM S3 communication hob structure.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PAYLOAD_S3_COMMUNICATION_GUID_H_
+#define PAYLOAD_S3_COMMUNICATION_GUID_H_
+
+extern EFI_GUID gS3CommunicationGuid;
+
+#pragma pack(1)
+
+typedef struct {
+ EFI_SMRAM_DESCRIPTOR CommBuffer;
+ BOOLEAN PldAcpiS3Enable;
+} PLD_S3_COMMUNICATION;
+
+///
+/// The information below is used for communication between bootloader and payload.
+/// It is used to save/store some registers in S3 path
+///
+/// This region exists only when gEfiAcpiVariableGuid HOB exist.
+/// when PLD_S3_INFO.PldAcpiS3Enable is false, the communication buffer is defined as below.
+///
+
+typedef struct {
+ UINT32 ApicId;
+ UINT32 SmmBase;
+} CPU_SMMBASE;
+
+typedef struct {
+ UINT8 SwSmiData;
+ UINT8 SwSmiTriggerValue;
+ UINT16 Reserved;
+ UINT32 CpuCount;
+ CPU_SMMBASE SmmBase[0];
+} SMM_S3_INFO;
+
+//
+// Payload would save this structure to S3 communication area in normal boot.
+// In S3 path, bootloader need restore SMM base and writie IO port 0xB2 with SwSmiTriggerValue
+// to trigger SMI to let payload to restore S3.
+//
+typedef struct {
+ EFI_HOB_GUID_TYPE Header;
+ SMM_S3_INFO S3Info;
+} PLD_TO_BL_SMM_INFO;
+
+#pragma pack()
+
+#endif
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