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| author | Guo Dong <guo.dong@intel.com> | 2021-10-15 12:10:11 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-10-19 04:27:41 +0000 |
| commit | 6ef57974472de604cf436ce904a88f0667cee8bd (patch) | |
| tree | 175db3ec47711ae8ffdf71feab8e51c6282c7aed /UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | |
| parent | 91a978ce7e0c7a327cff1d9411b0e1c9dae8824a (diff) | |
| download | edk2-6ef57974472de604cf436ce904a88f0667cee8bd.tar.gz edk2-6ef57974472de604cf436ce904a88f0667cee8bd.tar.bz2 edk2-6ef57974472de604cf436ce904a88f0667cee8bd.zip | |
UefiPayloadPkg: Fix ECC reported issues
V2: Fix more header files on #ifdef variable
ECC reported some issues on UefiPayloadPkg, this patch fixed
most of them except several files including ElfLib\Elf32.h,
coreboot.h, CbParseLib.c, etc.
It also removed unused functions in ResetSystemLib and Hob.c.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Diffstat (limited to 'UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c')
| -rw-r--r-- | UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index b0268f0506..eb28d48b3b 100644 --- a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -205,7 +205,7 @@ PcatPciRootBridgeParseBars ( //
// IO Bar
//
- if (Command & EFI_PCI_COMMAND_IO_SPACE) {
+ if ((Command & EFI_PCI_COMMAND_IO_SPACE) != 0) {
Mask = 0xfffffffc;
Base = OriginalValue & Mask;
Length = ((~(Value & Mask)) & Mask) + 0x04;
@@ -227,7 +227,7 @@ PcatPciRootBridgeParseBars ( //
// Mem Bar
//
- if (Command & EFI_PCI_COMMAND_MEMORY_SPACE) {
+ if ((Command & EFI_PCI_COMMAND_MEMORY_SPACE) != 0) {
Mask = 0xfffffff0;
Base = OriginalValue & Mask;
@@ -306,9 +306,14 @@ ScanForRootBridges ( UINT64 Base;
UINT64 Limit;
UINT64 Value;
- PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;
- PCI_ROOT_BRIDGE *RootBridges;
- UINTN BarOffsetEnd;
+ PCI_ROOT_BRIDGE_APERTURE Io;
+ PCI_ROOT_BRIDGE_APERTURE Mem;
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
+ PCI_ROOT_BRIDGE_APERTURE PMem;
+ PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
+ PCI_ROOT_BRIDGE_APERTURE *MemAperture;
+ PCI_ROOT_BRIDGE *RootBridges;
+ UINTN BarOffsetEnd;
*NumberOfRootBridges = 0;
|