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| author | Linus Liu <linus.liu@intel.com> | 2024-09-12 21:22:30 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-10-31 17:02:52 +0000 |
| commit | de19273e89160e5c5a32af0c07a0b8c3414adbdd (patch) | |
| tree | e47ed852f55fddb42a3b5dd47616d17430ea05df /UefiPayloadPkg | |
| parent | aac5b3eca3ea67e2cc9525a742334fb257235fe4 (diff) | |
| download | edk2-de19273e89160e5c5a32af0c07a0b8c3414adbdd.tar.gz edk2-de19273e89160e5c5a32af0c07a0b8c3414adbdd.tar.bz2 edk2-de19273e89160e5c5a32af0c07a0b8c3414adbdd.zip | |
UefiPayloadPkg: Modify PCI root reg .
Per Spec updated , update DMA Reg property filed
with each root bridge bus base and its bus limit.
Signed-off-by: Linus Liu <linus.liu@intel.com>
Diffstat (limited to 'UefiPayloadPkg')
| -rw-r--r-- | UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c b/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c index d7d44df78a..58a354a348 100644 --- a/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c +++ b/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c @@ -404,6 +404,7 @@ BuildFdtForPciRootBridge ( UINT32 RegTmp[2];
UINT32 RegData[21];
UINT32 DMARegData[8];
+ UINT64 Reg64Data[2];
UINT32 Data32;
UINT64 Data64;
UINT8 BusNumber;
@@ -611,11 +612,14 @@ BuildFdtForPciRootBridge ( Status = FdtSetProperty (Fdt, TempNode, "dma-ranges", &DMARegData, sizeof (DMARegData));
ASSERT_EFI_ERROR (Status);
- Data32 = CpuToFdt32 (2);
- Status = FdtSetProperty (Fdt, TempNode, "#size-cells", &Data32, sizeof (UINT32));
+ ASSERT (PciRootBridgeInfo->RootBridge[Index].Bus.Base <= 0xFF);
+ ASSERT (PciRootBridgeInfo->RootBridge[Index].Bus.Limit <= 0xFF);
- Data32 = CpuToFdt32 (3);
- Status = FdtSetProperty (Fdt, TempNode, "#address-cells", &Data32, sizeof (UINT32));
+ Reg64Data[0] = CpuToFdt64 (PciExpressBaseAddress + LShiftU64 (PciRootBridgeInfo->RootBridge[Index].Bus.Base, 20));
+ Reg64Data[1] = CpuToFdt64 (LShiftU64 (PciRootBridgeInfo->RootBridge[Index].Bus.Limit +1, 20));
+
+ Status = FdtSetProperty (Fdt, TempNode, "reg", &Reg64Data, sizeof (Reg64Data));
+ ASSERT_EFI_ERROR (Status);
BusNumber = PciRootBridgeInfo->RootBridge[Index].Bus.Base & 0xFF;
RegTmp[0] = CpuToFdt32 (BusNumber);
@@ -627,6 +631,12 @@ BuildFdtForPciRootBridge ( Status = FdtSetProperty (Fdt, TempNode, "bus-range", &RegTmp, sizeof (RegTmp));
ASSERT_EFI_ERROR (Status);
+ Data32 = CpuToFdt32 (2);
+ Status = FdtSetProperty (Fdt, TempNode, "#size-cells", &Data32, sizeof (UINT32));
+
+ Data32 = CpuToFdt32 (3);
+ Status = FdtSetProperty (Fdt, TempNode, "#address-cells", &Data32, sizeof (UINT32));
+
Status = FdtSetProperty (Fdt, TempNode, "compatible", "pci-rb", (UINT32)(AsciiStrLen ("pci-rb")+1));
ASSERT_EFI_ERROR (Status);
|