diff options
| author | Michael Kinney <michael.d.kinney@intel.com> | 2016-11-29 01:15:28 -0800 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-11-29 08:17:50 -0800 |
| commit | ff9a1358b3ff98b1c3a9b4b584fca71653a1c9fe (patch) | |
| tree | c81b980720f83def76569f87c25024c7c0f6f74f /Vlv2TbltDevicePkg | |
| parent | 71d86ec879ae573a264eed71dd1bff9d547e70b0 (diff) | |
| download | edk2-ff9a1358b3ff98b1c3a9b4b584fca71653a1c9fe.tar.gz edk2-ff9a1358b3ff98b1c3a9b4b584fca71653a1c9fe.tar.bz2 edk2-ff9a1358b3ff98b1c3a9b4b584fca71653a1c9fe.zip | |
Vlv2TbltDevicePkg: Fix IA32 boot timeouts
https://bugzilla.tianocore.org/show_bug.cgi?id=264
The IA32 build gets timeouts booting to the UEFI Shell.
Update the IA32 DSC file to match the X64 DSC file
disabling the fTPM feature.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: David Wei <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'Vlv2TbltDevicePkg')
| -rw-r--r-- | Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index 6d8815416d..3a5776abdd 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -77,9 +77,9 @@ DEFINE PLATFORM_PCIEXPRESS_BASE = 0E0000000
- DEFINE SEC_ENABLE = TRUE
- DEFINE SEC_DEBUG_INFO_ENABLE = TRUE
- DEFINE FTPM_ENABLE = TRUE
+ DEFINE SEC_ENABLE = FALSE
+ DEFINE SEC_DEBUG_INFO_ENABLE = FALSE
+ DEFINE FTPM_ENABLE = FALSE
################################################################################
#
@@ -848,9 +848,6 @@ !if $(TPM_ENABLED) == TRUE
gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x7b, 0x3a, 0xcd, 0x72, 0xA5, 0xFE, 0x5e, 0x4f, 0x91, 0x65, 0x4d, 0xd1, 0x21, 0x87, 0xbb, 0x13}
!endif
- !if $(FTPM_ENABLE) == TRUE
- gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x7b, 0x3a, 0xcd, 0x72, 0xA5, 0xFE, 0x5e, 0x4f, 0x91, 0x65, 0x4d, 0xd1, 0x21, 0x87, 0xbb, 0x13}
- !endif
## This PCD defines the video horizontal resolution.
# This PCD could be set to 0 then video resolution could be at highest resolution.
|