summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c52
1 files changed, 23 insertions, 29 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c
index 56e53561e9..84d59de78f 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c
@@ -1,7 +1,7 @@
/** @file
Clock Modulation feature.
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -67,40 +67,34 @@ ClockModulationInitialize (
IN BOOLEAN State
)
{
- if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
- CPU_REGISTER_TABLE_WRITE_FIELD (
- ProcessorNumber,
- Msr,
- MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION,
- MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER,
- Bits.OnDemandClockModulationDutyCycle,
- PcdGet8 (PcdCpuClockModulationDutyCycle)
- );
- CPU_REGISTER_TABLE_WRITE_FIELD (
- ProcessorNumber,
- Msr,
- MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION,
- MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER,
- Bits.OnDemandClockModulationEnable,
- (State) ? 1 : 0
- );
- } else {
- CPU_REGISTER_TABLE_WRITE_FIELD (
- ProcessorNumber,
- Msr,
- MSR_IA32_CLOCK_MODULATION,
- MSR_IA32_CLOCK_MODULATION_REGISTER,
- Bits.OnDemandClockModulationDutyCycle,
- PcdGet8 (PcdCpuClockModulationDutyCycle)
- );
+ CPUID_THERMAL_POWER_MANAGEMENT_EAX ThermalPowerManagementEax;
+ AsmCpuid (CPUID_THERMAL_POWER_MANAGEMENT, &ThermalPowerManagementEax.Uint32, NULL, NULL, NULL);
+
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_CLOCK_MODULATION,
+ MSR_IA32_CLOCK_MODULATION_REGISTER,
+ Bits.OnDemandClockModulationDutyCycle,
+ PcdGet8 (PcdCpuClockModulationDutyCycle) >> 1
+ );
+ if (ThermalPowerManagementEax.Bits.ECMD == 1) {
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,
Msr,
MSR_IA32_CLOCK_MODULATION,
MSR_IA32_CLOCK_MODULATION_REGISTER,
- Bits.OnDemandClockModulationEnable,
- (State) ? 1 : 0
+ Bits.ExtendedOnDemandClockModulationDutyCycle,
+ PcdGet8 (PcdCpuClockModulationDutyCycle) & BIT0
);
}
+ CPU_REGISTER_TABLE_WRITE_FIELD (
+ ProcessorNumber,
+ Msr,
+ MSR_IA32_CLOCK_MODULATION,
+ MSR_IA32_CLOCK_MODULATION_REGISTER,
+ Bits.OnDemandClockModulationEnable,
+ (State) ? 1 : 0
+ );
return RETURN_SUCCESS;
}