diff options
5 files changed, 43 insertions, 10 deletions
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c index 7b7c5f5d86..e25854c080 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
- Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -65,7 +65,7 @@ PeiFspMemoryInit ( FspHobListPtr = NULL;
FspmUpdDataPtr = NULL;
- FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
+ FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress)); DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));
if (FspmHeaderPtr == NULL) {
return EFI_DEVICE_ERROR;
@@ -155,8 +155,20 @@ FspmWrapperInit ( {
EFI_STATUS Status;
- Status = PeiFspMemoryInit ();
- ASSERT_EFI_ERROR (Status);
+ Status = EFI_SUCCESS; + + if (FixedPcdGet8 (PcdFspModeSelection) == 1) { + Status = PeiFspMemoryInit (); + ASSERT_EFI_ERROR (Status); + } else { + PeiServicesInstallFvInfoPpi ( + NULL, + (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength, + NULL, + NULL + ); + } return Status;
}
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index 542356b582..f4b7ef8db6 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
# notify to call FspSiliconInit API.
#
-# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR> #
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -61,6 +61,7 @@ [Pcd]
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES [Sources]
FspmWrapperPeim.c
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c index 70dac7a414..69cf568380 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
- Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -349,7 +349,17 @@ FspsWrapperPeimEntryPoint ( {
DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));
- FspsWrapperInit ();
+ if (FixedPcdGet8 (PcdFspModeSelection) == 1) { + FspsWrapperInit (); + } else { + PeiServicesInstallFvInfoPpi ( + NULL, + (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsBaseAddress))->FvLength, + NULL, + NULL + ); + } return EFI_SUCCESS;
}
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf index cd87a99c40..1e63f407cb 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
# notify to call FspSiliconInit API.
#
-# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR> #
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -68,6 +68,7 @@ [Pcd]
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES [Guids]
gFspHobGuid ## CONSUMES ## HOB
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec index 69df16452d..b901562bb3 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -71,9 +71,8 @@ ## Indicate the PEI memory size platform want to report
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
- ## This is the base address of FSP-T/M/S
+ ## This is the base address of FSP-T gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
- gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
# If a bit is set, that means this FSP API is skipped.<BR>
@@ -93,7 +92,17 @@ # @Prompt Skip FSP API from FSP wrapper.
gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
+ ## This PCD decides how Wrapper code utilizes FSP + # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API) + # 1: API mode (FSP Wrapper will call FSP API) + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A + [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
+ # + ## These are the base address of FSP-M/S + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
#
# To provide flexibility for platform to pre-allocate FSP UPD buffer
|