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-rw-r--r--OvmfPkg/OvmfPkg.dec2
-rw-r--r--OvmfPkg/PlatformPei/MemDetect.c6
-rw-r--r--OvmfPkg/SmmAccess/SmmAccessPei.c6
3 files changed, 7 insertions, 7 deletions
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 5627be0bab..021ac2a772 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -95,7 +95,7 @@
# undefined behavior.
#
# This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).
- gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT8|0x20
+ gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index af96a04d19..78a8e0de34 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -348,7 +348,7 @@ PublishPeiMemory (
//
// TSEG is chipped from the end of low RAM
//
- LowerMemorySize -= FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;
+ LowerMemorySize -= FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
}
//
@@ -456,7 +456,7 @@ QemuInitializeRam (
if (FeaturePcdGet (PcdSmmSmramRequire)) {
UINT32 TsegSize;
- TsegSize = FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;
+ TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
TRUE);
@@ -605,7 +605,7 @@ InitializeRamRegions (
// Make sure the TSEG area that we reported as a reserved memory resource
// cannot be used for reserved memory allocations.
//
- TsegSize = FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;
+ TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
BuildMemoryAllocationHob (
GetSystemMemorySizeBelow4gb() - TsegSize,
TsegSize,
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index a4ce610a46..76790e330f 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -319,7 +319,7 @@ SmmAccessPeiEntryPoint (
// Set TSEG Memory Base.
//
PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
- (TopOfLowRamMb - FixedPcdGet8 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+ (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
//
// Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
@@ -327,8 +327,8 @@ SmmAccessPeiEntryPoint (
// *restricted* to SMM.
//
EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
- EsmramcVal |= FixedPcdGet8 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
- FixedPcdGet8 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+ EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
+ FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
MCH_ESMRAMC_TSEG_1MB;
EsmramcVal |= MCH_ESMRAMC_T_EN;
PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);