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-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c64
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h10
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c49
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c50
4 files changed, 57 insertions, 116 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
index 3c68c97024..4c1499939b 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
@@ -1,7 +1,7 @@
/** @file
SMM CPU misc functions for Ia32 arch specific.
-Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -77,7 +77,12 @@ InitGdt (
GdtTssTableSize = (gcSmiGdtr.Limit + 1 + TSS_SIZE * 2 + 7) & ~7; // 8 bytes aligned
mGdtBufferSize = GdtTssTableSize * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
- GdtTssTables = (UINT8*)AllocateCodePages (EFI_SIZE_TO_PAGES (mGdtBufferSize));
+ //
+ // IA32 Stack Guard need use task switch to switch stack that need
+ // write GDT and TSS, so AllocateCodePages() could not be used here
+ // as code pages will be set to RO.
+ //
+ GdtTssTables = (UINT8*)AllocatePages (EFI_SIZE_TO_PAGES (mGdtBufferSize));
ASSERT (GdtTssTables != NULL);
mGdtBuffer = (UINTN)GdtTssTables;
GdtTableStepSize = GdtTssTableSize;
@@ -127,61 +132,6 @@ InitGdt (
}
/**
- This function sets GDT/IDT buffer to be RO and XP.
-**/
-VOID
-PatchGdtIdtMap (
- VOID
- )
-{
- EFI_PHYSICAL_ADDRESS BaseAddress;
- UINTN Size;
-
- //
- // GDT
- //
- DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - GDT:\n"));
-
- BaseAddress = mGdtBuffer;
- Size = ALIGN_VALUE(mGdtBufferSize, SIZE_4KB);
- if (!FeaturePcdGet (PcdCpuSmmStackGuard)) {
- //
- // Do not set RO for IA32 when stack guard feature is enabled.
- // Stack Guard need use task switch to switch stack.
- // It need write GDT and TSS.
- //
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_RO
- );
- }
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_XP
- );
-
- //
- // IDT
- //
- DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - IDT:\n"));
-
- BaseAddress = gcSmiIdtr.Base;
- Size = ALIGN_VALUE(gcSmiIdtr.Limit + 1, SIZE_4KB);
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_RO
- );
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_XP
- );
-}
-
-/**
Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
@param[in] ApHltLoopCode The address of the safe hlt-loop function.
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index ef32f17676..cbaa513244 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -1,7 +1,7 @@
/** @file
Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
-Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@@ -510,14 +510,6 @@ InitGdt (
);
/**
- This function sets GDT/IDT buffer to be RO and XP.
-**/
-VOID
-PatchGdtIdtMap (
- VOID
- );
-
-/**
Register the SMM Foundation entry point.
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
index 2d7dba59bf..16664f304c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
@@ -1,6 +1,6 @@
/** @file
-Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -769,6 +769,53 @@ PatchSmmSaveStateMap (
}
/**
+ This function sets GDT/IDT buffer to be RO and XP.
+**/
+VOID
+PatchGdtIdtMap (
+ VOID
+ )
+{
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINTN Size;
+
+ //
+ // GDT
+ //
+ DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - GDT:\n"));
+
+ BaseAddress = mGdtBuffer;
+ Size = ALIGN_VALUE(mGdtBufferSize, SIZE_4KB);
+ //
+ // The range should have been set to RO
+ // if it is allocated with EfiRuntimeServicesCode.
+ //
+ SmmSetMemoryAttributes (
+ BaseAddress,
+ Size,
+ EFI_MEMORY_XP
+ );
+
+ //
+ // IDT
+ //
+ DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - IDT:\n"));
+
+ BaseAddress = gcSmiIdtr.Base;
+ Size = ALIGN_VALUE(gcSmiIdtr.Limit + 1, SIZE_4KB);
+ SmmSetMemoryAttributes (
+ BaseAddress,
+ Size,
+ EFI_MEMORY_RO
+ );
+ SmmSetMemoryAttributes (
+ BaseAddress,
+ Size,
+ EFI_MEMORY_XP
+ );
+}
+
+/**
This function sets memory attribute according to MemoryAttributesTable.
**/
VOID
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
index 9d26e44a9a..6a5d453242 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
@@ -1,7 +1,7 @@
/** @file
SMM CPU misc functions for x64 arch specific.
-Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -96,54 +96,6 @@ InitGdt (
}
/**
- This function sets GDT/IDT buffer to be RO and XP.
-**/
-VOID
-PatchGdtIdtMap (
- VOID
- )
-{
- EFI_PHYSICAL_ADDRESS BaseAddress;
- UINTN Size;
-
- //
- // GDT
- //
- DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - GDT:\n"));
-
- BaseAddress = mGdtBuffer;
- Size = ALIGN_VALUE(mGdtBufferSize, SIZE_4KB);
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_RO
- );
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_XP
- );
-
- //
- // IDT
- //
- DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - IDT:\n"));
-
- BaseAddress = gcSmiIdtr.Base;
- Size = ALIGN_VALUE(gcSmiIdtr.Limit + 1, SIZE_4KB);
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_RO
- );
- SmmSetMemoryAttributes (
- BaseAddress,
- Size,
- EFI_MEMORY_XP
- );
-}
-
-/**
Get Protected mode code segment from current GDT table.
@return Protected mode code segment value.
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 03:16:14 +0000