diff options
| -rw-r--r-- | UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 4 | ||||
| -rw-r--r-- | UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c | 4 | ||||
| -rw-r--r-- | UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 8 | ||||
| -rwxr-xr-x | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 4 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 6 |
5 files changed, 13 insertions, 13 deletions
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c index 60f4bbc1fd..d19349d4b0 100644 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c +++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c @@ -1,7 +1,7 @@ /** @file
Produces the CPU I/O 2 Protocol.
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@@ -141,7 +141,7 @@ CpuIoCheckParameter ( //
// Check to see if Address is aligned
//
- if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
+ if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {
return EFI_UNSUPPORTED;
}
diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c index 7b1ad37515..20b8350fe4 100644 --- a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c +++ b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c @@ -1,7 +1,7 @@ /** @file
Produces the SMM CPU I/O Protocol.
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -126,7 +126,7 @@ CpuIoCheckParameter ( //
// Check to see if Address is aligned
//
- if ((Address & (UINT64)(mStride[Width] - 1)) != 0) {
+ if ((Address & ((UINT64)mStride[Width] - 1)) != 0) {
return EFI_UNSUPPORTED;
}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c index bb123badc8..03937dcbe2 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c @@ -1,7 +1,7 @@ /** @file
SMM STM support functions
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -276,8 +276,8 @@ SmmCpuFeaturesInstallSmiHandler ( UINT32 RegEdx;
EFI_PROCESSOR_INFORMATION ProcessorInfo;
- CopyMem ((VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
- Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET);
+ CopyMem ((VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
+ Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET);
Psd->SmmGdtPtr = GdtBase;
Psd->SmmGdtSize = (UINT32)GdtSize;
@@ -317,7 +317,7 @@ SmmCpuFeaturesInstallSmiHandler ( // Copy template to CPU specific SMI handler location
//
CopyMem (
- (VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),
+ (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
(VOID*)gcStmSmiHandlerTemplate,
gcStmSmiHandlerSize
);
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index d5b89002bf..d06148263c 100755 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -1,7 +1,7 @@ /** @file
Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@@ -1282,7 +1282,7 @@ AllocateAlignedCodePages ( Status = gSmst->SmmFreePages (Memory, UnalignedPages);
ASSERT_EFI_ERROR (Status);
}
- Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));
+ Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);
UnalignedPages = RealPages - Pages - UnalignedPages;
if (UnalignedPages > 0) {
//
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c index b4bc0ec6a5..3188d43818 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c @@ -1,7 +1,7 @@ /** @file
Provides services to access SMRAM Save State Map
-Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -690,7 +690,7 @@ InstallSmiHandler ( //
// Initialize PROCESSOR_SMM_DESCRIPTOR
//
- Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + SMM_PSD_OFFSET);
+ Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + SMM_PSD_OFFSET);
CopyMem (Psd, &gcPsd, sizeof (gcPsd));
Psd->SmmGdtPtr = (UINT64)GdtBase;
Psd->SmmGdtSize = (UINT32)GdtSize;
@@ -731,7 +731,7 @@ InstallSmiHandler ( // Copy template to CPU specific SMI handler location
//
CopyMem (
- (VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),
+ (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
(VOID*)gcSmiHandlerTemplate,
gcSmiHandlerSize
);
|