diff options
| -rw-r--r-- | UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 6 | ||||
| -rw-r--r-- | UefiCpuPkg/Include/AcpiCpuData.h | 6 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 10 |
3 files changed, 11 insertions, 11 deletions
diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c index 3489b9549c..07c7102fe0 100644 --- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c +++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c @@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so this module does not support hot plug CPUs. This module can be copied into a CPU specific package
and customized if these additional features are required.
-Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Red Hat, Inc.
This program and the accompanying materials
@@ -246,12 +246,12 @@ CpuS3DataInitialize ( RegisterTable[Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
RegisterTable[Index].TableLength = 0;
RegisterTable[Index].AllocatedSize = 0;
- RegisterTable[Index].RegisterTableEntry = NULL;
+ RegisterTable[Index].RegisterTableEntry = 0;
RegisterTable[NumberOfCpus + Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
RegisterTable[NumberOfCpus + Index].TableLength = 0;
RegisterTable[NumberOfCpus + Index].AllocatedSize = 0;
- RegisterTable[NumberOfCpus + Index].RegisterTableEntry = NULL;
+ RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0;
}
AcpiCpuData->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;
AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus);
diff --git a/UefiCpuPkg/Include/AcpiCpuData.h b/UefiCpuPkg/Include/AcpiCpuData.h index 12e9692c5c..130eb90895 100644 --- a/UefiCpuPkg/Include/AcpiCpuData.h +++ b/UefiCpuPkg/Include/AcpiCpuData.h @@ -1,7 +1,7 @@ /** @file
Definitions for CPU S3 data.
-Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -55,10 +55,10 @@ typedef struct { //
UINT32 InitialApicId;
//
- // Buffer of CPU_REGISTER_TABLE_ENTRY structures. This buffer must be
+ // Physical address of CPU_REGISTER_TABLE_ENTRY structures. This buffer must be
// allocated below 4GB from memory of type EfiACPIMemoryNVS.
//
- CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
+ EFI_PHYSICAL_ADDRESS RegisterTableEntry;
} CPU_REGISTER_TABLE;
//
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 532b7c44bd..12efc1f90e 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -1,7 +1,7 @@ /** @file
Code for Processor S3 restoration
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -826,13 +826,12 @@ CopyRegisterTable ( CopyMem (DestinationRegisterTableList, SourceRegisterTableList, NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
for (Index = 0; Index < NumberOfCpus; Index++) {
- DestinationRegisterTableList[Index].RegisterTableEntry = AllocatePool (DestinationRegisterTableList[Index].AllocatedSize);
- ASSERT (DestinationRegisterTableList[Index].RegisterTableEntry != NULL);
- CopyMem (DestinationRegisterTableList[Index].RegisterTableEntry, SourceRegisterTableList[Index].RegisterTableEntry, DestinationRegisterTableList[Index].AllocatedSize);
+ RegisterTableEntry = AllocatePool (DestinationRegisterTableList[Index].AllocatedSize);
+ ASSERT (RegisterTableEntry != NULL);
+ CopyMem (RegisterTableEntry, (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry, DestinationRegisterTableList[Index].AllocatedSize);
//
// Go though all MSRs in register table to initialize MSR spin lock
//
- RegisterTableEntry = DestinationRegisterTableList[Index].RegisterTableEntry;
for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) {
if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) {
//
@@ -841,6 +840,7 @@ CopyRegisterTable ( InitMsrSpinLockByIndex (RegisterTableEntry->Index);
}
}
+ DestinationRegisterTableList[Index].RegisterTableEntry = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry;
}
}
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