3 files changed, 10 insertions, 10 deletions
diff --git a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c
index f3afc4360f..353f41bfba 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c
@@ -13,7 +13,7 @@
 #include <Library/ArmDisassemblerLib.h>
 
 /**
-  Place a disassembly of of **OpCodePtr into buffer, and update OpCodePtr to
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
   point to next instruction.
 
   @param  OpCodePtrPtr  Pointer to pointer of instruction to disassemble.
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
index b38a4ce07f..b4f0f8dbbf 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
@@ -137,8 +137,8 @@ RotateRight (
 
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
index dbfaee0586..b665132d69 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
@@ -1,5 +1,5 @@
 /** @file
-  Thumb Dissassembler. Still a work in progress.
+  Thumb Disassembler. Still a work in progress.
 
   Wrong output is a bug, so please fix it.
   Hex output means there is not yet an entry or a decode bug.
@@ -103,7 +103,7 @@ typedef struct {
 } THUMB_INSTRUCTIONS;
 
 THUMB_INSTRUCTIONS gOpThumb[] = {
-// Thumb 16-bit instrucitons
+// Thumb 16-bit instructions
 //          Op       Mask   Format
   { "ADC" , 0x4140, 0xffc0, DATA_FORMAT5 },  // ADC <Rndn>, <Rm>
   { "ADR",  0xa000, 0xf800, ADR_FORMAT   },  // ADR <Rd>, <label>
@@ -447,7 +447,7 @@ SignExtend32 (
 
 //
 // Some instructions specify the PC is always considered aligned
-// The PC is after the instruction that is excuting. So you pass
+// The PC is after the instruction that is executing. So you pass
 // in the instruction address and you get back the aligned answer
 //
 UINT32
@@ -459,8 +459,8 @@ PCAlign4 (
 }
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.
@@ -1023,8 +1023,8 @@ DisassembleArmInstruction (
 
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.