diff options
Diffstat (limited to 'ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S')
| -rw-r--r-- | ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S | 130 |
1 files changed, 78 insertions, 52 deletions
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S index 8ca37f0be0..54f36174bb 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S @@ -12,44 +12,36 @@ # #------------------------------------------------------------------------------ -.globl ASM_PFX(Cp15IdCode) -INTERWORK_FUNC(Cp15IdCode) -.globl ASM_PFX(Cp15CacheInfo) -INTERWORK_FUNC(Cp15CacheInfo) -.globl ASM_PFX(ArmEnableInterrupts) -INTERWORK_FUNC(ArmEnableInterrupts) -.globl ASM_PFX(ArmDisableInterrupts) -INTERWORK_FUNC(ArmDisableInterrupts) -.globl ASM_PFX(ArmGetInterruptState) -INTERWORK_FUNC(ArmGetInterruptState) -.globl ASM_PFX(ArmEnableFiq) -INTERWORK_FUNC(ArmEnableFiq) -.globl ASM_PFX(ArmDisableFiq) -INTERWORK_FUNC(ArmDisableFiq) -.globl ASM_PFX(ArmGetFiqState) -INTERWORK_FUNC(ArmGetFiqState) -.globl ASM_PFX(ArmInvalidateTlb) -INTERWORK_FUNC(ArmInvalidateTlb) -.globl ASM_PFX(ArmSetTranslationTableBaseAddress) -INTERWORK_FUNC(ArmSetTranslationTableBaseAddress) -.globl ASM_PFX(ArmGetTranslationTableBaseAddress) -INTERWORK_FUNC(ArmGetTranslationTableBaseAddress) -.globl ASM_PFX(ArmSetDomainAccessControl) -INTERWORK_FUNC(ArmSetDomainAccessControl) -.globl ASM_PFX(ArmUpdateTranslationTableEntry) -INTERWORK_FUNC(ArmUpdateTranslationTableEntry) -.globl ASM_PFX(CPSRMaskInsert) -INTERWORK_FUNC(CPSRMaskInsert) -.globl ASM_PFX(CPSRRead) -INTERWORK_FUNC(CPSRRead) -.globl ASM_PFX(ReadCCSIDR) -INTERWORK_FUNC(ReadCCSIDR) -.globl ASM_PFX(ReadCLIDR) -INTERWORK_FUNC(ReadCLIDR) +#include <AsmMacroIoLib.h> .text .align 2 +GCC_ASM_EXPORT(Cp15IdCode) +GCC_ASM_EXPORT(Cp15CacheInfo) +GCC_ASM_EXPORT(ArmIsMPCore) +GCC_ASM_EXPORT(ArmEnableAsynchronousAbort) +GCC_ASM_EXPORT(ArmDisableAsynchronousAbort) +GCC_ASM_EXPORT(ArmEnableIrq) +GCC_ASM_EXPORT(ArmDisableIrq) +GCC_ASM_EXPORT(ArmGetInterruptState) +GCC_ASM_EXPORT(ArmEnableFiq) +GCC_ASM_EXPORT(ArmDisableFiq) +GCC_ASM_EXPORT(ArmEnableInterrupts) +GCC_ASM_EXPORT(ArmDisableInterrupts) +GCC_ASM_EXPORT(ArmGetFiqState) +GCC_ASM_EXPORT(ArmInvalidateTlb) +GCC_ASM_EXPORT(ArmSetTTBR0) +GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress) +GCC_ASM_EXPORT(ArmSetDomainAccessControl) +GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry) +GCC_ASM_EXPORT(CPSRMaskInsert) +GCC_ASM_EXPORT(CPSRRead) +GCC_ASM_EXPORT(ReadCCSIDR) +GCC_ASM_EXPORT(ReadCLIDR) + + + #------------------------------------------------------------------------------ ASM_PFX(Cp15IdCode): @@ -60,35 +52,67 @@ ASM_PFX(Cp15CacheInfo): mrc p15,0,R0,c0,c0,1 bx LR -ASM_PFX(ArmEnableInterrupts): +ASM_PFX(ArmIsMPCore): + mrc p15,0,R0,c0,c0,5 + // Get Multiprocessing extension (bit31) & U bit (bit30) + and R0, R0, #0xC0000000 + // if bit30 == 0 then the processor is part of a multiprocessor system) + and R0, R0, #0x80000000 + bx LR + +ASM_PFX(ArmEnableAsynchronousAbort): + cpsie a + isb + bx LR + +ASM_PFX(ArmDisableAsynchronousAbort): + cpsid a + isb + bx LR + +ASM_PFX(ArmEnableIrq): cpsie i - bx LR + isb + bx LR -ASM_PFX(ArmDisableInterrupts): +ASM_PFX(ArmDisableIrq): cpsid i - bx LR + isb + bx LR ASM_PFX(ArmGetInterruptState): - mrs R0,CPSR - tst R0,#0x80 @Check if IRQ is enabled. - moveq R0,#1 - movne R0,#0 - bx LR + mrs R0,CPSR + tst R0,#0x80 @Check if IRQ is enabled. + moveq R0,#1 + movne R0,#0 + bx LR ASM_PFX(ArmEnableFiq): cpsie f - bx LR + isb + bx LR ASM_PFX(ArmDisableFiq): cpsid f - bx LR + isb + bx LR + +ASM_PFX(ArmEnableInterrupts): + cpsie if + isb + bx LR + +ASM_PFX(ArmDisableInterrupts): + cpsid if + isb + bx LR ASM_PFX(ArmGetFiqState): - mrs R0,CPSR - tst R0,#0x40 @Check if FIQ is enabled. - moveq R0,#1 - movne R0,#0 - bx LR + mrs R0,CPSR + tst R0,#0x40 @Check if FIQ is enabled. + moveq R0,#1 + movne R0,#0 + bx LR ASM_PFX(ArmInvalidateTlb): mov r0,#0 @@ -98,13 +122,15 @@ ASM_PFX(ArmInvalidateTlb): isb bx lr -ASM_PFX(ArmSetTranslationTableBaseAddress): +ASM_PFX(ArmSetTTBR0): mcr p15,0,r0,c2,c0,0 isb bx lr -ASM_PFX(ArmGetTranslationTableBaseAddress): +ASM_PFX(ArmGetTTBR0BaseAddress): mrc p15,0,r0,c2,c0,0 + LoadConstantToReg(0xFFFFC000, r1) + and r0, r0, r1 isb bx lr |