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-rw-r--r--IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm6
1 files changed, 4 insertions, 2 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm
index 26ae7d9fd3..8d8deba28a 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm
@@ -1,12 +1,14 @@
;; @file
; Provide FSP API entry points.
;
-; Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;;
SECTION .text
+STACK_SAVED_EAX_OFFSET EQU 4 * 7 ; size of a general purpose register * eax index
+
;
; Following functions will be provided in C
;
@@ -52,7 +54,7 @@ FspApiCommon1:
add esp, 8
cmp eax, 0
jz FspApiCommon2
- mov dword [esp + (4 * 7)], eax
+ mov dword [esp + STACK_SAVED_EAX_OFFSET], eax
popad
exit:
ret