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-rw-r--r--MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c
index d08fb9f193..d5efcf49a4 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c
@@ -11,26 +11,6 @@
#include <Library/DebugLib.h>
/**
- RISC-V invalidate instruction cache.
-
-**/
-VOID
-EFIAPI
-RiscVInvalidateInstCacheAsm (
- VOID
- );
-
-/**
- RISC-V invalidate data cache.
-
-**/
-VOID
-EFIAPI
-RiscVInvalidateDataCacheAsm (
- VOID
- );
-
-/**
Invalidates the entire instruction cache in cache coherency domain of the
calling CPU.