diff options
Diffstat (limited to 'MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c')
| -rw-r--r-- | MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c | 38 |
1 files changed, 25 insertions, 13 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c b/MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c index 30aa63243b..40e8c08beb 100644 --- a/MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c +++ b/MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c @@ -2,7 +2,7 @@ GCC inline implementation of BaseLib processor specific functions that use
privlidged instructions.
- Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -10,6 +10,7 @@ #include "BaseLibInternals.h"
+#include <Library/RegisterFilterLib.h>
/**
Enables CPU interrupts.
@@ -63,12 +64,17 @@ AsmReadMsr64 ( )
{
UINT64 Data;
-
- __asm__ __volatile__ (
- "rdmsr"
- : "=A" (Data) // %0
- : "c" (Index) // %1
- );
+ BOOLEAN Flag;
+
+ Flag = FilterBeforeMsrRead (Index, &Data);
+ if (Flag) {
+ __asm__ __volatile__ (
+ "rdmsr"
+ : "=A" (Data) // %0
+ : "c" (Index) // %1
+ );
+ }
+ FilterAfterMsrRead (Index, &Data);
return Data;
}
@@ -97,12 +103,18 @@ AsmWriteMsr64 ( IN UINT64 Value
)
{
- __asm__ __volatile__ (
- "wrmsr"
- :
- : "c" (Index),
- "A" (Value)
- );
+ BOOLEAN Flag;
+
+ Flag = FilterBeforeMsrWrite (Index, &Value);
+ if (Flag) {
+ __asm__ __volatile__ (
+ "wrmsr"
+ :
+ : "c" (Index),
+ "A" (Value)
+ );
+ }
+ FilterAfterMsrWrite (Index, &Value);
return Value;
}
|