diff options
Diffstat (limited to 'MdePkg/Library/BaseLib')
325 files changed, 18742 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/ARShiftU64.c b/MdePkg/Library/BaseLib/ARShiftU64.c new file mode 100644 index 0000000000..feb5430311 --- /dev/null +++ b/MdePkg/Library/BaseLib/ARShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
+ with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+ARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathARShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/BaseLib.mbd b/MdePkg/Library/BaseLib/BaseLib.mbd new file mode 100644 index 0000000000..971777a6d1 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseLib</BaseName>
+ <Guid>27d67720-ea68-48ae-93da-a3a074c90e30</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-22 18:15</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseLib/BaseLib.msa b/MdePkg/Library/BaseLib/BaseLib.msa new file mode 100644 index 0000000000..efc9eadda7 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLib.msa @@ -0,0 +1,309 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>27d67720-ea68-48ae-93da-a3a074c90e30</Guid>
+ <Version>0</Version>
+ <Abstract>Memory-only library functions with no library constructordestructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-22 18:15</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">TimerLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>String.c</Filename>
+ <Filename>LinkedList.c</Filename>
+ <Filename>Synchronization.c</Filename>
+ <Filename>Cpu.c</Filename>
+ <Filename>CpuDeadLoop.c</Filename>
+ <Filename>BitField.c</Filename>
+ <Filename>ARShiftU64.c</Filename>
+ <Filename>DivS64x64Remainder.c</Filename>
+ <Filename>DivU64x32.c</Filename>
+ <Filename>DivU64x32Remainder.c</Filename>
+ <Filename>DivU64x64Remainder.c</Filename>
+ <Filename>GetPowerOfTwo32.c</Filename>
+ <Filename>GetPowerOfTwo64.c</Filename>
+ <Filename>HighBitSet32.c</Filename>
+ <Filename>HighBitSet64.c</Filename>
+ <Filename>LowBitSet32.c</Filename>
+ <Filename>LowBitSet64.c</Filename>
+ <Filename>LRotU32.c</Filename>
+ <Filename>LRotU64.c</Filename>
+ <Filename>LShiftU64.c</Filename>
+ <Filename>ModU64x32.c</Filename>
+ <Filename>MultS64x64.c</Filename>
+ <Filename>MultU64x32.c</Filename>
+ <Filename>MultU64x64.c</Filename>
+ <Filename>RRotU32.c</Filename>
+ <Filename>RRotU64.c</Filename>
+ <Filename>RShiftU64.c</Filename>
+ <Filename>SwapBytes16.c</Filename>
+ <Filename>SwapBytes32.c</Filename>
+ <Filename>SwapBytes64.c</Filename>
+ <Arch ArchType="IA32">
+ <Filename>x86LowLevel.c</Filename>
+ <Filename>x86Thunk.c</Filename>
+ <Filename>Unaligned.c</Filename>
+ <Filename>Ia32\Non-existing.c</Filename>
+ <Filename>Ia32\LShiftU64.asm</Filename>
+ <Filename>Ia32\RShiftU64.asm</Filename>
+ <Filename>Ia32\ARShiftU64.asm</Filename>
+ <Filename>Ia32\LRotU64.asm</Filename>
+ <Filename>Ia32\RRotU64.asm</Filename>
+ <Filename>Ia32\MultU64x32.asm</Filename>
+ <Filename>Ia32\MultU64x64.asm</Filename>
+ <Filename>Ia32\DivU64x32.asm</Filename>
+ <Filename>Ia32\ModU64x32.asm</Filename>
+ <Filename>Ia32\DivU64x32Remainder.asm</Filename>
+ <Filename>Ia32\DivU64x64Remainder.asm</Filename>
+ <Filename>Ia32\DivS64x64Remainder.c</Filename>
+ <Filename>Ia32\SwapBytes64.asm</Filename>
+ <Filename>Ia32\SetJump.asm</Filename>
+ <Filename>Ia32\LongJump.asm</Filename>
+ <Filename>Ia32\SwitchStack.c</Filename>
+ <Filename>Ia32\CpuId.asm</Filename>
+ <Filename>Ia32\ReadEflags.asm</Filename>
+ <Filename>Ia32\ReadMsr64.asm</Filename>
+ <Filename>Ia32\WriteMsr32.asm</Filename>
+ <Filename>Ia32\WriteMsr64.asm</Filename>
+ <Filename>Ia32\ReadCr0.asm</Filename>
+ <Filename>Ia32\ReadCr2.asm</Filename>
+ <Filename>Ia32\ReadCr3.asm</Filename>
+ <Filename>Ia32\ReadCr4.asm</Filename>
+ <Filename>Ia32\WriteCr0.asm</Filename>
+ <Filename>Ia32\WriteCr2.asm</Filename>
+ <Filename>Ia32\WriteCr3.asm</Filename>
+ <Filename>Ia32\WriteCr4.asm</Filename>
+ <Filename>Ia32\ReadDr0.asm</Filename>
+ <Filename>Ia32\ReadDr1.asm</Filename>
+ <Filename>Ia32\ReadDr2.asm</Filename>
+ <Filename>Ia32\ReadDr3.asm</Filename>
+ <Filename>Ia32\ReadDr4.asm</Filename>
+ <Filename>Ia32\ReadDr5.asm</Filename>
+ <Filename>Ia32\ReadDr6.asm</Filename>
+ <Filename>Ia32\ReadDr7.asm</Filename>
+ <Filename>Ia32\WriteDr0.asm</Filename>
+ <Filename>Ia32\WriteDr1.asm</Filename>
+ <Filename>Ia32\WriteDr2.asm</Filename>
+ <Filename>Ia32\WriteDr3.asm</Filename>
+ <Filename>Ia32\WriteDr4.asm</Filename>
+ <Filename>Ia32\WriteDr5.asm</Filename>
+ <Filename>Ia32\WriteDr6.asm</Filename>
+ <Filename>Ia32\WriteDr7.asm</Filename>
+ <Filename>Ia32\ReadCs.asm</Filename>
+ <Filename>Ia32\ReadDs.asm</Filename>
+ <Filename>Ia32\ReadEs.asm</Filename>
+ <Filename>Ia32\ReadFs.asm</Filename>
+ <Filename>Ia32\ReadGs.asm</Filename>
+ <Filename>Ia32\ReadSs.asm</Filename>
+ <Filename>Ia32\ReadTr.asm</Filename>
+ <Filename>Ia32\ReadGdtr.asm</Filename>
+ <Filename>Ia32\WriteGdtr.asm</Filename>
+ <Filename>Ia32\ReadIdtr.asm</Filename>
+ <Filename>Ia32\WriteIdtr.asm</Filename>
+ <Filename>Ia32\ReadLdtr.asm</Filename>
+ <Filename>Ia32\WriteLdtr.asm</Filename>
+ <Filename>Ia32\FxSave.asm</Filename>
+ <Filename>Ia32\FxRestore.asm</Filename>
+ <Filename>Ia32\ReadMm0.asm</Filename>
+ <Filename>Ia32\ReadMm1.asm</Filename>
+ <Filename>Ia32\ReadMm2.asm</Filename>
+ <Filename>Ia32\ReadMm3.asm</Filename>
+ <Filename>Ia32\ReadMm4.asm</Filename>
+ <Filename>Ia32\ReadMm5.asm</Filename>
+ <Filename>Ia32\ReadMm6.asm</Filename>
+ <Filename>Ia32\ReadMm7.asm</Filename>
+ <Filename>Ia32\WriteMm0.asm</Filename>
+ <Filename>Ia32\WriteMm1.asm</Filename>
+ <Filename>Ia32\WriteMm2.asm</Filename>
+ <Filename>Ia32\WriteMm3.asm</Filename>
+ <Filename>Ia32\WriteMm4.asm</Filename>
+ <Filename>Ia32\WriteMm5.asm</Filename>
+ <Filename>Ia32\WriteMm6.asm</Filename>
+ <Filename>Ia32\WriteMm7.asm</Filename>
+ <Filename>Ia32\ReadTsc.asm</Filename>
+ <Filename>Ia32\ReadPmc.asm</Filename>
+ <Filename>Ia32\Monitor.asm</Filename>
+ <Filename>Ia32\Mwait.asm</Filename>
+ <Filename>Ia32\EnablePaging32.asm</Filename>
+ <Filename>Ia32\DisablePaging32.asm</Filename>
+ <Filename>Ia32\EnablePaging64.asm</Filename>
+ <Filename>Ia32\Wbinvd.asm</Filename>
+ <Filename>Ia32\Invd.asm</Filename>
+ <Filename>Ia32\FlushCacheLine.asm</Filename>
+ <Filename>Ia32\InterlockedIncrement.asm</Filename>
+ <Filename>Ia32\InterlockedDecrement.asm</Filename>
+ <Filename>Ia32\InterlockedCompareExchange32.asm</Filename>
+ <Filename>Ia32\InterlockedCompareExchange64.asm</Filename>
+ <Filename>Ia32\EnableInterrupts.asm</Filename>
+ <Filename>Ia32\DisableInterrupts.asm</Filename>
+ <Filename>Ia32\EnableDisableInterrupts.asm</Filename>
+ <Filename>Ia32\CpuSleep.asm</Filename>
+ <Filename>Ia32\CpuPause.asm</Filename>
+ <Filename>Ia32\CpuBreakpoint.asm</Filename>
+ <Filename>Ia32\CpuFlushTlb.asm</Filename>
+ <Filename>Ia32\Thunk16.asm</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>x86LowLevel.c</Filename>
+ <Filename>x86Thunk.c</Filename>
+ <Filename>Unaligned.c</Filename>
+ <Filename>Math64.c</Filename>
+ <Filename>x64\Non-existing.c</Filename>
+ <Filename>x64\SwitchStack.asm</Filename>
+ <Filename>x64\SetJump.asm</Filename>
+ <Filename>x64\LongJump.asm</Filename>
+ <Filename>x64\CpuId.asm</Filename>
+ <Filename>x64\ReadEflags.asm</Filename>
+ <Filename>x64\ReadMsr32.asm</Filename>
+ <Filename>x64\ReadMsr64.asm</Filename>
+ <Filename>x64\WriteMsr32.asm</Filename>
+ <Filename>x64\WriteMsr64.asm</Filename>
+ <Filename>x64\ReadCr0.asm</Filename>
+ <Filename>x64\ReadCr2.asm</Filename>
+ <Filename>x64\ReadCr3.asm</Filename>
+ <Filename>x64\ReadCr4.asm</Filename>
+ <Filename>x64\WriteCr0.asm</Filename>
+ <Filename>x64\WriteCr2.asm</Filename>
+ <Filename>x64\WriteCr3.asm</Filename>
+ <Filename>x64\WriteCr4.asm</Filename>
+ <Filename>x64\ReadDr0.asm</Filename>
+ <Filename>x64\ReadDr1.asm</Filename>
+ <Filename>x64\ReadDr2.asm</Filename>
+ <Filename>x64\ReadDr3.asm</Filename>
+ <Filename>x64\ReadDr4.asm</Filename>
+ <Filename>x64\ReadDr5.asm</Filename>
+ <Filename>x64\ReadDr6.asm</Filename>
+ <Filename>x64\ReadDr7.asm</Filename>
+ <Filename>x64\WriteDr0.asm</Filename>
+ <Filename>x64\WriteDr1.asm</Filename>
+ <Filename>x64\WriteDr2.asm</Filename>
+ <Filename>x64\WriteDr3.asm</Filename>
+ <Filename>x64\WriteDr4.asm</Filename>
+ <Filename>x64\WriteDr5.asm</Filename>
+ <Filename>x64\WriteDr6.asm</Filename>
+ <Filename>x64\WriteDr7.asm</Filename>
+ <Filename>x64\ReadCs.asm</Filename>
+ <Filename>x64\ReadDs.asm</Filename>
+ <Filename>x64\ReadEs.asm</Filename>
+ <Filename>x64\ReadFs.asm</Filename>
+ <Filename>x64\ReadGs.asm</Filename>
+ <Filename>x64\ReadSs.asm</Filename>
+ <Filename>x64\ReadTr.asm</Filename>
+ <Filename>x64\ReadGdtr.asm</Filename>
+ <Filename>x64\WriteGdtr.asm</Filename>
+ <Filename>x64\ReadIdtr.asm</Filename>
+ <Filename>x64\WriteIdtr.asm</Filename>
+ <Filename>x64\ReadLdtr.asm</Filename>
+ <Filename>x64\WriteLdtr.asm</Filename>
+ <Filename>x64\FxSave.asm</Filename>
+ <Filename>x64\FxRestore.asm</Filename>
+ <Filename>x64\ReadMm0.asm</Filename>
+ <Filename>x64\ReadMm1.asm</Filename>
+ <Filename>x64\ReadMm2.asm</Filename>
+ <Filename>x64\ReadMm3.asm</Filename>
+ <Filename>x64\ReadMm4.asm</Filename>
+ <Filename>x64\ReadMm5.asm</Filename>
+ <Filename>x64\ReadMm6.asm</Filename>
+ <Filename>x64\ReadMm7.asm</Filename>
+ <Filename>x64\WriteMm0.asm</Filename>
+ <Filename>x64\WriteMm1.asm</Filename>
+ <Filename>x64\WriteMm2.asm</Filename>
+ <Filename>x64\WriteMm3.asm</Filename>
+ <Filename>x64\WriteMm4.asm</Filename>
+ <Filename>x64\WriteMm5.asm</Filename>
+ <Filename>x64\WriteMm6.asm</Filename>
+ <Filename>x64\WriteMm7.asm</Filename>
+ <Filename>x64\ReadTsc.asm</Filename>
+ <Filename>x64\ReadPmc.asm</Filename>
+ <Filename>x64\Monitor.asm</Filename>
+ <Filename>x64\Mwait.asm</Filename>
+ <Filename>x64\DisablePaging64.asm</Filename>
+ <Filename>x64\Wbinvd.asm</Filename>
+ <Filename>x64\Invd.asm</Filename>
+ <Filename>x64\FlushCacheLine.asm</Filename>
+ <Filename>x64\InterlockedIncrement.asm</Filename>
+ <Filename>x64\InterlockedDecrement.asm</Filename>
+ <Filename>x64\InterlockedCompareExchange32.asm</Filename>
+ <Filename>x64\InterlockedCompareExchange64.asm</Filename>
+ <Filename>x64\EnableInterrupts.asm</Filename>
+ <Filename>x64\DisableInterrupts.asm</Filename>
+ <Filename>x64\EnableDisableInterrupts.asm</Filename>
+ <Filename>x64\CpuSleep.asm</Filename>
+ <Filename>x64\CpuPause.asm</Filename>
+ <Filename>x64\CpuBreakpoint.asm</Filename>
+ <Filename>x64\CpuFlushTlb.asm</Filename>
+ <Filename>x64\Thunk16.asm</Filename>
+ </Arch>
+ <Arch ArchType="IPF">
+ <Filename>Math64.c</Filename>
+ <Filename>Ipf\setjmp.s</Filename>
+ <Filename>Ipf\SwitchStack.s</Filename>
+ <Filename>Ipf\Unaligned.c</Filename>
+ <Filename>Ipf\CpuBreakpoint.c</Filename>
+ <Filename>Ipf\InterlockedCompareExchange32.s</Filename>
+ <Filename>Ipf\InterlockedCompareExchange64.s</Filename>
+ <Filename>Ipf\Synchronization.c</Filename>
+ </Arch>
+ <Arch ArchType="EBC">
+ <Filename>Math64.c</Filename>
+ <Filename>SwitchStack.c</Filename>
+ <Filename>SetJumpLongJump.c</Filename>
+ <Filename>Unaligned.c</Filename>
+ <Filename>Ebc\CpuBreakpoint.c</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdMaximumUnicodeStringLength</C_Name>
+ <Token>0x00000001</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdMaximumAsciiStringLength</C_Name>
+ <Token>0x00000002</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdMaximumLinkedListLength</C_Name>
+ <Token>0x00000003</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdSpinLockTimeout</C_Name>
+ <Token>0x00000004</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseLib/BaseLibInternals.h b/MdePkg/Library/BaseLib/BaseLibInternals.h new file mode 100644 index 0000000000..4cccdae528 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLibInternals.h @@ -0,0 +1,195 @@ +/** @file
+ Declaration of internal functions in BaseLib.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseLibInternals.h
+
+**/
+
+#ifndef __BASE_LIB_INTERNALS__
+#define __BASE_LIB_INTERNALS__
+
+//
+// Math functions
+//
+
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ );
+
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ );
+
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ );
+
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ );
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ );
+
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ );
+
+//
+// Ia32 and x64 specific functions
+//
+
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ );
+
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ );
+
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ );
+
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ );
+
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ );
+
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ );
+
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+VOID
+EFIAPI
+InternalX86EnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ );
+
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseLib/BitField.c b/MdePkg/Library/BaseLib/BitField.c new file mode 100644 index 0000000000..ad953396ac --- /dev/null +++ b/MdePkg/Library/BaseLib/BitField.c @@ -0,0 +1,812 @@ +/** @file
+ Bit field functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BitField.c
+
+**/
+
+unsigned int
+EFIAPI
+BitFieldReadUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return (Operand & ~((unsigned int)-2 << EndBit)) >> StartBit;
+}
+
+unsigned int
+EFIAPI
+BitFieldOrUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int OrData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand | ((OrData << StartBit) & ~((unsigned int)-2 << EndBit));
+}
+
+unsigned int
+EFIAPI
+BitFieldAndUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int AndData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand & ~((~AndData << StartBit) & ~((unsigned int)-2 << EndBit));
+}
+
+/**
+ Returns a bit field from an 8-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The bit field read.
+
+**/
+UINT8
+EFIAPI
+BitFieldRead8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an 8-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 8-bit value is
+ returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldWrite8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr8 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAnd8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAndThenOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr8 (
+ BitFieldAnd8 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 16-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The bit field read.
+
+**/
+UINT16
+EFIAPI
+BitFieldRead16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 16-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 16-bit value is
+ returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldWrite16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr16 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAnd16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAndThenOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr16 (
+ BitFieldAnd16 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 32-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read.
+
+**/
+UINT32
+EFIAPI
+BitFieldRead32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 32-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 32-bit value is
+ returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldWrite32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr32 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAnd32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAndThenOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr32 (
+ BitFieldAnd32 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 64-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The bit field read.
+
+**/
+UINT64
+EFIAPI
+BitFieldRead64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return RShiftU64 (Operand & ~LShiftU64 ((UINT64)-2, EndBit), StartBit);
+}
+
+/**
+ Writes a bit field to a 64-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 64-bit value is
+ returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldWrite64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr64 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return Operand |
+ (LShiftU64 (OrData, StartBit) & ~LShiftU64 ((UINT64)-2, EndBit));
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAnd64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return Operand &
+ ~(LShiftU64 (~AndData, StartBit) & ~LShiftU64 ((UINT64)-2, EndBit));
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAndThenOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr64 (
+ BitFieldAnd64 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
diff --git a/MdePkg/Library/BaseLib/Cpu.c b/MdePkg/Library/BaseLib/Cpu.c new file mode 100644 index 0000000000..cc7a608f83 --- /dev/null +++ b/MdePkg/Library/BaseLib/Cpu.c @@ -0,0 +1,67 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Cpu.c
+
+**/
+
+/**
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ @retval TRUE CPU interrupts were enabled on entry to this call.
+ @retval FALSE CPU interrupts were disabled on entry to this call.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndDisableInterrupts (
+ VOID
+ )
+{
+ BOOLEAN InterruptState;
+
+ InterruptState = GetInterruptState ();
+ DisableInterrupts ();
+ return InterruptState;
+}
+
+/**
+ Set the current CPU interrupt state.
+
+ Sets the current CPU interrupt state to the state specified by
+ InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+ InterruptState is FALSE, then interrupts are disabled. InterruptState is
+ returned.
+
+ @param InterruptState TRUE if interrupts should enabled. FALSE if
+ interrupts should be disabled.
+
+ @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+SetInterruptState (
+ IN BOOLEAN InterruptState
+ )
+{
+ if (InterruptState) {
+ EnableInterrupts ();
+ } else {
+ DisableInterrupts ();
+ }
+ return InterruptState;
+}
diff --git a/MdePkg/Library/BaseLib/CpuDeadLoop.c b/MdePkg/Library/BaseLib/CpuDeadLoop.c new file mode 100644 index 0000000000..f8f530207a --- /dev/null +++ b/MdePkg/Library/BaseLib/CpuDeadLoop.c @@ -0,0 +1,33 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Executes an infinite loop.
+
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip
+ past the loop and the code that follows the loop must execute properly. This
+ implies that the infinite loop must not cause the code that follow it to be
+ optimized away.
+
+**/
+VOID
+EFIAPI
+CpuDeadLoop (
+ VOID
+ )
+{
+ volatile UINTN Index;
+
+ for (Index = 0; Index == 0;);
+}
diff --git a/MdePkg/Library/BaseLib/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/DivS64x64Remainder.c new file mode 100644 index 0000000000..aa28fc8ccb --- /dev/null +++ b/MdePkg/Library/BaseLib/DivS64x64Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit signed
+ value Divisor and generates a 64-bit signed quotient. If Remainder is not
+ NULL, then the 64-bit signed remainder is returned in Remainder. This
+ function returns the 64-bit signed quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+DivS64x64Remainder (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemS64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x32.c b/MdePkg/Library/BaseLib/DivU64x32.c new file mode 100644 index 0000000000..b223c6c87b --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivU64x32 (Dividend, Divisor);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/DivU64x32Remainder.c new file mode 100644 index 0000000000..aa34b31e46 --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x32Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32Remainder (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x32 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x64Remainder.c b/MdePkg/Library/BaseLib/DivU64x64Remainder.c new file mode 100644 index 0000000000..0caa5295aa --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x64Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x64Remainder (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c new file mode 100644 index 0000000000..b0b262f367 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c @@ -0,0 +1,100 @@ +/** @file
+ Base Library CPU Functions for EBC
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+extern
+UINT64
+_break (
+ CHAR8 BreakCode
+ );
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ _break (3);
+}
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+}
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+ return FALSE;
+}
diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo32.c b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c new file mode 100644 index 0000000000..6dfe8056b4 --- /dev/null +++ b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c @@ -0,0 +1,39 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 32-bit value. Equivalent to
+ 1 << HighBitSet32(x).
+
+ This function computes the value of the highest bit set in the 32-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return 1 << HighBitSet32(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT32
+EFIAPI
+GetPowerOfTwo32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitPos;
+
+ return (BitPos = HighBitSet32 (Operand)) > 0 ? 1ul << BitPos : 0;
+}
diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo64.c b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c new file mode 100644 index 0000000000..9994fb8f12 --- /dev/null +++ b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c @@ -0,0 +1,39 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 64-bit value. Equivalent to
+ 1 << HighBitSet64(x).
+
+ This function computes the value of the highest bit set in the 64-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return 1 << HighBitSet64(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT64
+EFIAPI
+GetPowerOfTwo64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitPos;
+
+ return (BitPos = HighBitSet64 (Operand)) > 0 ? LShiftU64 (1, BitPos) : 0;
+}
diff --git a/MdePkg/Library/BaseLib/HighBitSet32.c b/MdePkg/Library/BaseLib/HighBitSet32.c new file mode 100644 index 0000000000..65f067ac1a --- /dev/null +++ b/MdePkg/Library/BaseLib/HighBitSet32.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 32-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ for (BitIndex = -1; Operand != 0; BitIndex++, Operand >>= 1);
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/HighBitSet64.c b/MdePkg/Library/BaseLib/HighBitSet64.c new file mode 100644 index 0000000000..50889777b5 --- /dev/null +++ b/MdePkg/Library/BaseLib/HighBitSet64.c @@ -0,0 +1,43 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 64-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitIndex;
+
+ for (BitIndex = -1;
+ Operand != 0;
+ BitIndex++, Operand = RShiftU64 (Operand, 1));
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c new file mode 100644 index 0000000000..987fc9c846 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c @@ -0,0 +1,101 @@ +/** @file
+ Base Library CPU functions for Itanium
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//void __mfa (void);
+
+#pragma intrinsic (_enable)
+#pragma intrinsic (_disable)
+#pragma intrinsic (__break)
+#pragma intrinsic (__mfa)
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __break (0);
+}
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+ __mfa ();
+}
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ _disable ();
+}
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ _enable ();
+}
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ return FALSE;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s new file mode 100644 index 0000000000..3a278d7268 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s @@ -0,0 +1,29 @@ +/// @file
+/// Contains an implementation of InterlockedCompareExchange32 on Itanium-
+/// based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: InterlockedCompareExchange32.s
+///
+///
+
+.auto
+.text
+
+.proc InternalSyncCompareExchange32
+.type InternalSyncCompareExchange32, @function
+InternalSyncCompareExchange32::
+ zxt4 r33 = r33
+ mov ar.ccv = r33
+ cmpxchg4.rel r8 = [r32], r34
+ mf
+ br.ret.sptk.many b0
+.endp InternalSyncCompareExchange32
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s new file mode 100644 index 0000000000..200e30e09e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s @@ -0,0 +1,28 @@ +/// @file
+/// Contains an implementation of InterlockedCompareExchange64 on Itanium-
+/// based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: InterlockedCompareExchange64.s
+///
+///
+
+.auto
+.text
+
+.proc InternalSyncCompareExchange64
+.type InternalSyncCompareExchange64, @function
+InternalSyncCompareExchange64::
+ mov ar.ccv = r33
+ cmpxchg8.rel r8 = [r64], r34
+ mf
+ br.ret.sptk.many b0
+.endp InternalSyncCompareExchange64
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/Ipf/SwitchStack.s b/MdePkg/Library/BaseLib/Ipf/SwitchStack.s new file mode 100644 index 0000000000..4dd17f533e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/SwitchStack.s @@ -0,0 +1,122 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// SwitchStack.s
+//
+// Abstract:
+//
+// Contains an implementation of a stack switch for the Itanium-based architecture.
+//
+//
+//
+// Revision History:
+//
+//--
+
+ .file "SwitchStack.s"
+
+#include "asm.h"
+#include "ia_64gen.h"
+
+// Define hardware RSE Configuration Register
+//
+// RS Configuration (RSC) bit field positions
+
+#define RSC_MODE 0
+#define RSC_PL 2
+#define RSC_BE 4
+// RSC bits 5-15 reserved
+#define RSC_MBZ0 5
+#define RSC_MBZ0_V 0x3ff
+#define RSC_LOADRS 16
+#define RSC_LOADRS_LEN 14
+// RSC bits 30-63 reserved
+#define RSC_MBZ1 30
+#define RSC_MBZ1_V 0x3ffffffffULL
+
+// RSC modes
+// Lazy
+#define RSC_MODE_LY (0x0)
+// Store intensive
+#define RSC_MODE_SI (0x1)
+// Load intensive
+#define RSC_MODE_LI (0x2)
+// Eager
+#define RSC_MODE_EA (0x3)
+
+// RSC Endian bit values
+#define RSC_BE_LITTLE 0
+#define RSC_BE_BIG 1
+
+// RSC while in kernel: enabled, little endian, pl = 0, eager mode
+#define RSC_KERNEL ((RSC_MODE_EA<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))
+// Lazy RSC in kernel: enabled, little endian, pl = 0, lazy mode
+#define RSC_KERNEL_LAZ ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))
+// RSE disabled: disabled, pl = 0, little endian, eager mode
+#define RSC_KERNEL_DISABLED ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))
+
+
+//VOID
+//SwitchStack (
+// VOID *ContinuationFunction,
+// UINTN Parameter,
+// UINTN NewTopOfStack,
+// UINTN NewBSPStore OPTIONAL
+//)
+///*++
+//
+//Input Arguments
+//
+// ContinuationFunction - This is a pointer to the PLABEL of the function that should be called once the
+// new stack has been created.
+// Parameter - The parameter to pass to the continuation function
+// NewTopOfStack - This is the new top of the memory stack for ensuing code. This is mandatory and
+// should be non-zero
+// NewBSPStore - This is the new BSP store for the ensuing code. It is optional on IA-32 and mandatory on Itanium-based platform.
+//
+//--*/
+
+PROCEDURE_ENTRY(SwitchStack)
+
+ mov r16 = -0x10;;
+ and r16 = r34, r16;; // get new stack value in R16, 0 the last nibble.
+ mov r15 = r35;; // Get new BspStore into R15
+ mov r13 = r32;; // this is a pointer to the PLABEL of the continuation function.
+ mov r17 = r33;; // this is the parameter to pass to the continuation function
+
+ alloc r11=0,0,0,0 // Set 0-size frame
+ ;;
+ flushrs;;
+
+ mov r21 = RSC_KERNEL_DISABLED // for rse disable
+ ;;
+ mov ar.rsc = r21 // turn off RSE
+
+ add sp = r0, r16;; // transfer to the EFI stack
+ mov ar.bspstore = r15 // switch to EFI BSP
+ invala // change of ar.bspstore needs invala.
+
+ mov r18 = RSC_KERNEL_LAZ // RSC enabled, Lazy mode
+ ;;
+ mov ar.rsc = r18 // turn rse on, in kernel mode
+ ;;
+ alloc r11=0,0,1,0;; // alloc 0 outs going to ensuing DXE IPL service
+ mov out0 = r17
+ ld8 r16 = [r13],8;; // r16 = address of continuation function from the PLABEL
+ ld8 gp = [r13] // gp = gp of continuation function from the PLABEL
+ mov b6 = r16
+ ;;
+ br.call.sptk.few b0=b6;; // Call the continuation function
+ ;;
+PROCEDURE_EXIT(SwitchStack)
+
+
diff --git a/MdePkg/Library/BaseLib/Ipf/Synchronization.c b/MdePkg/Library/BaseLib/Ipf/Synchronization.c new file mode 100644 index 0000000000..9eb8799e30 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/Synchronization.c @@ -0,0 +1,59 @@ +/** @file
+ Implementation of synchronization functions on Itanium.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 OriginalValue;
+
+ do {
+ OriginalValue = *Value;
+ } while (OriginalValue == InternalSyncCompareExchange32 (
+ Value,
+ OriginalValue,
+ OriginalValue + 1
+ ));
+ return OriginalValue + 1;
+}
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 OriginalValue;
+
+ do {
+ OriginalValue = *Value;
+ } while (OriginalValue == InternalSyncCompareExchange32 (
+ Value,
+ OriginalValue,
+ OriginalValue - 1
+ ));
+ return OriginalValue - 1;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/Unaligned.c b/MdePkg/Library/BaseLib/Ipf/Unaligned.c new file mode 100644 index 0000000000..eeeb0f85bb --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/Unaligned.c @@ -0,0 +1,220 @@ +/** @file
+ Unaligned access functions of BaseLib for IPF.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ return (UINT16)(((UINT8*)Buffer)[0] | (((UINT8*)Buffer)[1] << 8));
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ ((UINT8*)Buffer)[0] = (UINT8)Value;
+ ((UINT8*)Buffer)[1] = (UINT8)(Value >> 8);
+ return Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return (UINT32)(
+ ReadUnaligned16 ((UINT16*)Buffer) |
+ (((UINT8*)Buffer)[2] << 16)
+ );
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
+ *(UINT8*)((UINT16*)Buffer + 1) = (UINT8)(Value >> 16);
+ return Value;
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return (UINT32)(
+ ReadUnaligned16 ((UINT16*)Buffer) |
+ (ReadUnaligned16 ((UINT16*)Buffer + 1) << 16)
+ );
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
+ WriteUnaligned16 ((UINT16*)Buffer + 1, (UINT16)(Value >> 16));
+ return Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ return (UINT64)(
+ ReadUnaligned32 ((UINT32*)Buffer) |
+ LShiftU64 (ReadUnaligned32 ((UINT32*)Buffer + 1), 32)
+ );
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ WriteUnaligned32 ((UINT32*)Buffer, (UINT32)Value);
+ WriteUnaligned32 ((UINT32*)Buffer + 1, (UINT32)RShiftU64 (Value, 32));
+ return Value;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/asm.h b/MdePkg/Library/BaseLib/Ipf/asm.h new file mode 100644 index 0000000000..8ef0b30626 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/asm.h @@ -0,0 +1,27 @@ +/// @file
+/// This module contains generic macros for an assembly writer.
+///
+/// Copyright (c) 2006, Intel Corporation<BR>
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: asm.h
+///
+#ifndef _ASM_H
+#define _ASM_H
+
+#define TRUE 1
+#define FALSE 0
+#define PROCEDURE_ENTRY(name) .##text; \
+ .##type name, @function; \
+ .##proc name; \
+ name::
+
+#define PROCEDURE_EXIT(name) .##endp name
+
+#endif // _ASM_H
diff --git a/MdePkg/Library/BaseLib/Ipf/ia_64gen.h b/MdePkg/Library/BaseLib/Ipf/ia_64gen.h new file mode 100644 index 0000000000..081cc4a8f6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/ia_64gen.h @@ -0,0 +1,205 @@ +/// @file
+///
+///
+/// Copyright (c) 2006, Intel Corporation<BR>
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: ia_64gen.h
+///
+#ifndef _IA64GEN_H
+#define _IA64GEN_H
+
+#define TT_UNAT 0
+#define C_PSR 0
+#define J_UNAT 0
+#define T_TYPE 0
+#define T_IPSR 0x8
+#define T_ISR 0x10
+#define T_IIP 0x18
+#define T_IFA 0x20
+#define T_IIPA 0x28
+#define T_IFS 0x30
+#define T_IIM 0x38
+#define T_RSC 0x40
+#define T_BSP 0x48
+#define T_BSPSTORE 0x50
+#define T_RNAT 0x58
+#define T_PFS 0x60
+#define T_KBSPSTORE 0x68
+#define T_UNAT 0x70
+#define T_CCV 0x78
+#define T_DCR 0x80
+#define T_PREDS 0x88
+#define T_NATS 0x90
+#define T_R1 0x98
+#define T_GP 0x98
+#define T_R2 0xa0
+#define T_R3 0xa8
+#define T_R4 0xb0
+#define T_R5 0xb8
+#define T_R6 0xc0
+#define T_R7 0xc8
+#define T_R8 0xd0
+#define T_R9 0xd8
+#define T_R10 0xe0
+#define T_R11 0xe8
+#define T_R12 0xf0
+#define T_SP 0xf0
+#define T_R13 0xf8
+#define T_R14 0x100
+#define T_R15 0x108
+#define T_R16 0x110
+#define T_R17 0x118
+#define T_R18 0x120
+#define T_R19 0x128
+#define T_R20 0x130
+#define T_R21 0x138
+#define T_R22 0x140
+#define T_R23 0x148
+#define T_R24 0x150
+#define T_R25 0x158
+#define T_R26 0x160
+#define T_R27 0x168
+#define T_R28 0x170
+#define T_R29 0x178
+#define T_R30 0x180
+#define T_R31 0x188
+#define T_F2 0x1f0
+#define T_F3 0x200
+#define T_F4 0x210
+#define T_F5 0x220
+#define T_F6 0x230
+#define T_F7 0x240
+#define T_F8 0x250
+#define T_F9 0x260
+#define T_F10 0x270
+#define T_F11 0x280
+#define T_F12 0x290
+#define T_F13 0x2a0
+#define T_F14 0x2b0
+#define T_F15 0x2c0
+#define T_F16 0x2d0
+#define T_F17 0x2e0
+#define T_F18 0x2f0
+#define T_F19 0x300
+#define T_F20 0x310
+#define T_F21 0x320
+#define T_F22 0x330
+#define T_F23 0x340
+#define T_F24 0x350
+#define T_F25 0x360
+#define T_F26 0x370
+#define T_F27 0x380
+#define T_F28 0x390
+#define T_F29 0x3a0
+#define T_F30 0x3b0
+#define T_F31 0x3c0
+#define T_FPSR 0x1e0
+#define T_B0 0x190
+#define T_B1 0x198
+#define T_B2 0x1a0
+#define T_B3 0x1a8
+#define T_B4 0x1b0
+#define T_B5 0x1b8
+#define T_B6 0x1c0
+#define T_B7 0x1c8
+#define T_EC 0x1d0
+#define T_LC 0x1d8
+#define J_NATS 0x8
+#define J_PFS 0x10
+#define J_BSP 0x18
+#define J_RNAT 0x20
+#define J_PREDS 0x28
+#define J_LC 0x30
+#define J_R4 0x38
+#define J_R5 0x40
+#define J_R6 0x48
+#define J_R7 0x50
+#define J_SP 0x58
+#define J_F2 0x60
+#define J_F3 0x70
+#define J_F4 0x80
+#define J_F5 0x90
+#define J_F16 0xa0
+#define J_F17 0xb0
+#define J_F18 0xc0
+#define J_F19 0xd0
+#define J_F20 0xe0
+#define J_F21 0xf0
+#define J_F22 0x100
+#define J_F23 0x110
+#define J_F24 0x120
+#define J_F25 0x130
+#define J_F26 0x140
+#define J_F27 0x150
+#define J_F28 0x160
+#define J_F29 0x170
+#define J_F30 0x180
+#define J_F31 0x190
+#define J_FPSR 0x1a0
+#define J_B0 0x1a8
+#define J_B1 0x1b0
+#define J_B2 0x1b8
+#define J_B3 0x1c0
+#define J_B4 0x1c8
+#define J_B5 0x1d0
+#define TRAP_FRAME_LENGTH 0x3d0
+#define C_UNAT 0x28
+#define C_NATS 0x30
+#define C_PFS 0x8
+#define C_BSPSTORE 0x10
+#define C_RNAT 0x18
+#define C_RSC 0x20
+#define C_PREDS 0x38
+#define C_LC 0x40
+#define C_DCR 0x48
+#define C_R1 0x50
+#define C_GP 0x50
+#define C_R4 0x58
+#define C_R5 0x60
+#define C_R6 0x68
+#define C_R7 0x70
+#define C_SP 0x78
+#define C_R13 0x80
+#define C_F2 0x90
+#define C_F3 0xa0
+#define C_F4 0xb0
+#define C_F5 0xc0
+#define C_F16 0xd0
+#define C_F17 0xe0
+#define C_F18 0xf0
+#define C_F19 0x100
+#define C_F20 0x110
+#define C_F21 0x120
+#define C_F22 0x130
+#define C_F23 0x140
+#define C_F24 0x150
+#define C_F25 0x160
+#define C_F26 0x170
+#define C_F27 0x180
+#define C_F28 0x190
+#define C_F29 0x1a0
+#define C_F30 0x1b0
+#define C_F31 0x1c0
+#define C_FPSR 0x1d0
+#define C_B0 0x1d8
+#define C_B1 0x1e0
+#define C_B2 0x1e8
+#define C_B3 0x1f0
+#define C_B4 0x1f8
+#define C_B5 0x200
+#define TT_R2 0x8
+#define TT_R3 0x10
+#define TT_R8 0x18
+#define TT_R9 0x20
+#define TT_R10 0x28
+#define TT_R11 0x30
+#define TT_R14 0x38
+
+#endif _IA64GEN_H
diff --git a/MdePkg/Library/BaseLib/Ipf/setjmp.s b/MdePkg/Library/BaseLib/Ipf/setjmp.s new file mode 100644 index 0000000000..6569db6af4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/setjmp.s @@ -0,0 +1,317 @@ +/// @file
+/// Contains an implementation of setjmp and longjmp for the
+/// Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: setjmp.s
+///
+///
+
+ .file "setjmp.s"
+
+#include "asm.h"
+#include "ia_64gen.h"
+
+/// int SetJump(struct jmp_buffer save)
+///
+/// Setup a non-local goto.
+///
+/// Description:
+///
+/// SetJump stores the current register set in the area pointed to
+/// by "save". It returns zero. Subsequent calls to "LongJump" will
+/// restore the registers and return non-zero to the same location.
+///
+/// On entry, r32 contains the pointer to the jmp_buffer
+///
+
+PROCEDURE_ENTRY(SetJump)
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ mov r32 = r33
+
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to next 16 byte boundary
+
+ add r10 = J_PREDS, r32 // skip Unats & pfs save area
+ add r11 = J_BSP, r32
+ //
+ // save immediate context
+ //
+ mov r2 = ar.bsp // save backing store pointer
+ mov r3 = pr // save predicates
+ ;;
+ //
+ // save user Unat register
+ //
+ mov r16 = ar.lc // save loop count register
+ mov r14 = ar.unat // save user Unat register
+
+ st8 [r10] = r3, J_LC-J_PREDS
+ st8 [r11] = r2, J_R4-J_BSP
+ ;;
+ st8 [r10] = r16, J_R5-J_LC
+ st8 [r32] = r14, J_NATS // Note: Unat at the
+ // beginning of the save area
+ mov r15 = ar.pfs
+ ;;
+ //
+ // save preserved general registers & NaT's
+ //
+ st8.spill [r11] = r4, J_R6-J_R4
+ ;;
+ st8.spill [r10] = r5, J_R7-J_R5
+ ;;
+ st8.spill [r11] = r6, J_SP-J_R6
+ ;;
+ st8.spill [r10] = r7, J_F3-J_R7
+ ;;
+ st8.spill [r11] = sp, J_F2-J_SP
+ ;;
+ //
+ // save spilled Unat and pfs registers
+ //
+ mov r2 = ar.unat // save Unat register after spill
+ ;;
+ st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
+ ;;
+ st8 [r32] = r15 // save pfs
+ //
+ // save floating registers
+ //
+ stf.spill [r11] = f2, J_F4-J_F2
+ stf.spill [r10] = f3, J_F5-J_F3
+ ;;
+ stf.spill [r11] = f4, J_F16-J_F4
+ stf.spill [r10] = f5, J_F17-J_F5
+ ;;
+ stf.spill [r11] = f16, J_F18-J_F16
+ stf.spill [r10] = f17, J_F19-J_F17
+ ;;
+ stf.spill [r11] = f18, J_F20-J_F18
+ stf.spill [r10] = f19, J_F21-J_F19
+ ;;
+ stf.spill [r11] = f20, J_F22-J_F20
+ stf.spill [r10] = f21, J_F23-J_F21
+ ;;
+ stf.spill [r11] = f22, J_F24-J_F22
+ stf.spill [r10] = f23, J_F25-J_F23
+ ;;
+ stf.spill [r11] = f24, J_F26-J_F24
+ stf.spill [r10] = f25, J_F27-J_F25
+ ;;
+ stf.spill [r11] = f26, J_F28-J_F26
+ stf.spill [r10] = f27, J_F29-J_F27
+ ;;
+ stf.spill [r11] = f28, J_F30-J_F28
+ stf.spill [r10] = f29, J_F31-J_F29
+ ;;
+ stf.spill [r11] = f30, J_FPSR-J_F30
+ stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
+ //
+ // save FPSR register & branch registers
+ //
+ mov r2 = ar.fpsr // save fpsr register
+ mov r3 = b0
+ ;;
+ st8 [r11] = r2, J_B1-J_FPSR
+ st8 [r10] = r3, J_B2-J_B0
+ mov r2 = b1
+ mov r3 = b2
+ ;;
+ st8 [r11] = r2, J_B3-J_B1
+ st8 [r10] = r3, J_B4-J_B2
+ mov r2 = b3
+ mov r3 = b4
+ ;;
+ st8 [r11] = r2, J_B5-J_B3
+ st8 [r10] = r3
+ mov r2 = b5
+ ;;
+ st8 [r11] = r2
+ ;;
+ //
+ // return
+ //
+ mov r8 = r0 // return 0 from setjmp
+ mov ar.unat = r14 // restore unat
+ br.ret.sptk b0
+
+PROCEDURE_EXIT(SetJump)
+
+
+//
+// void LongJump(struct jmp_buffer *)
+//
+// Perform a non-local goto.
+//
+// Description:
+//
+// LongJump initializes the register set to the values saved by a
+// previous 'SetJump' and jumps to the return location saved by that
+// 'SetJump'. This has the effect of unwinding the stack and returning
+// for a second time to the 'SetJump'.
+//
+
+PROCEDURE_ENTRY(LongJump)
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ mov r32 = r33
+
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to next 16 byte boundary
+
+ //
+ // caching the return value as we do invala in the end
+ //
+/// mov r8 = r33 // return value
+ mov r8 = 1 // For now return hard coded 1
+
+ //
+ // get immediate context
+ //
+ mov r14 = ar.rsc // get user RSC conf
+ add r10 = J_PFS, r32 // get address of pfs
+ add r11 = J_NATS, r32
+ ;;
+ ld8 r15 = [r10], J_BSP-J_PFS // get pfs
+ ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
+ ;;
+ mov ar.unat = r2
+ ;;
+ ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
+ mov ar.rsc = r0 // put RSE in enforced lazy
+ mov ar.pfs = r15
+ ;;
+
+ //
+ // while returning from longjmp the BSPSTORE and BSP needs to be
+ // same and discard all the registers allocated after we did
+ // setjmp. Also, we need to generate the RNAT register since we
+ // did not flushed the RSE on setjmp.
+ //
+ mov r17 = ar.bspstore // get current BSPSTORE
+ ;;
+ cmp.ltu p6,p7 = r17, r16 // is it less than BSP of
+(p6) br.spnt.few .flush_rse
+ mov r19 = ar.rnat // get current RNAT
+ ;;
+ loadrs // invalidate dirty regs
+ br.sptk.many .restore_rnat // restore RNAT
+
+.flush_rse:
+ flushrs
+ ;;
+ mov r19 = ar.rnat // get current RNAT
+ mov r17 = r16 // current BSPSTORE
+ ;;
+.restore_rnat:
+ //
+ // check if RNAT is saved between saved BSP and curr BSPSTORE
+ //
+ dep r18 = 1,r16,3,6 // get RNAT address
+ ;;
+ cmp.ltu p8,p9 = r18, r17 // RNAT saved on RSE
+ ;;
+(p8) ld8 r19 = [r18] // get RNAT from RSE
+ ;;
+ mov ar.bspstore = r16 // set new BSPSTORE
+ ;;
+ mov ar.rnat = r19 // restore RNAT
+ mov ar.rsc = r14 // restore RSC conf
+
+
+ ld8 r3 = [r11], J_R4-J_LC // get lc register
+ ld8 r2 = [r10], J_R5-J_PREDS // get predicates
+ ;;
+ mov pr = r2, -1
+ mov ar.lc = r3
+ //
+ // restore preserved general registers & NaT's
+ //
+ ld8.fill r4 = [r11], J_R6-J_R4
+ ;;
+ ld8.fill r5 = [r10], J_R7-J_R5
+ ld8.fill r6 = [r11], J_SP-J_R6
+ ;;
+ ld8.fill r7 = [r10], J_F2-J_R7
+ ld8.fill sp = [r11], J_F3-J_SP
+ ;;
+ //
+ // restore floating registers
+ //
+ ldf.fill f2 = [r10], J_F4-J_F2
+ ldf.fill f3 = [r11], J_F5-J_F3
+ ;;
+ ldf.fill f4 = [r10], J_F16-J_F4
+ ldf.fill f5 = [r11], J_F17-J_F5
+ ;;
+ ldf.fill f16 = [r10], J_F18-J_F16
+ ldf.fill f17 = [r11], J_F19-J_F17
+ ;;
+ ldf.fill f18 = [r10], J_F20-J_F18
+ ldf.fill f19 = [r11], J_F21-J_F19
+ ;;
+ ldf.fill f20 = [r10], J_F22-J_F20
+ ldf.fill f21 = [r11], J_F23-J_F21
+ ;;
+ ldf.fill f22 = [r10], J_F24-J_F22
+ ldf.fill f23 = [r11], J_F25-J_F23
+ ;;
+ ldf.fill f24 = [r10], J_F26-J_F24
+ ldf.fill f25 = [r11], J_F27-J_F25
+ ;;
+ ldf.fill f26 = [r10], J_F28-J_F26
+ ldf.fill f27 = [r11], J_F29-J_F27
+ ;;
+ ldf.fill f28 = [r10], J_F30-J_F28
+ ldf.fill f29 = [r11], J_F31-J_F29
+ ;;
+ ldf.fill f30 = [r10], J_FPSR-J_F30
+ ldf.fill f31 = [r11], J_B0-J_F31 ;;
+
+ //
+ // restore branch registers and fpsr
+ //
+ ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
+ ld8 r17 = [r11], J_B2-J_B0 // get return pointer
+ ;;
+ mov ar.fpsr = r16
+ mov b0 = r17
+ ld8 r2 = [r10], J_B3-J_B1
+ ld8 r3 = [r11], J_B4-J_B2
+ ;;
+ mov b1 = r2
+ mov b2 = r3
+ ld8 r2 = [r10], J_B5-J_B3
+ ld8 r3 = [r11]
+ ;;
+ mov b3 = r2
+ mov b4 = r3
+ ld8 r2 = [r10]
+ ld8 r21 = [r32] // get user unat
+ ;;
+ mov b5 = r2
+ mov ar.unat = r21
+
+ //
+ // invalidate ALAT
+ //
+ invala ;;
+
+ br.ret.sptk b0
+PROCEDURE_EXIT(LongJump)
+
+
diff --git a/MdePkg/Library/BaseLib/LRotU32.c b/MdePkg/Library/BaseLib/LRotU32.c new file mode 100644 index 0000000000..ea782463d0 --- /dev/null +++ b/MdePkg/Library/BaseLib/LRotU32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT32
+EFIAPI
+LRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand << Count) | (Operand >> (32 - Count));
+}
diff --git a/MdePkg/Library/BaseLib/LRotU64.c b/MdePkg/Library/BaseLib/LRotU64.c new file mode 100644 index 0000000000..cf751f98f5 --- /dev/null +++ b/MdePkg/Library/BaseLib/LRotU64.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+LRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLRotU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/LShiftU64.c b/MdePkg/Library/BaseLib/LShiftU64.c new file mode 100644 index 0000000000..50449eb9e3 --- /dev/null +++ b/MdePkg/Library/BaseLib/LShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
+ with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+LShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/LinkedList.c b/MdePkg/Library/BaseLib/LinkedList.c new file mode 100644 index 0000000000..0f42749775 --- /dev/null +++ b/MdePkg/Library/BaseLib/LinkedList.c @@ -0,0 +1,433 @@ +/** @file
+ Linked List Library Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LinkedList.c
+
+**/
+
+BOOLEAN
+EFIAPI
+IsNodeInList (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ UINTN Count;
+ CONST LIST_ENTRY *Ptr;
+ BOOLEAN Found;
+
+ //
+ // Test the validity of List and Node
+ //
+ ASSERT (List != NULL);
+ ASSERT (List->ForwardLink != NULL);
+ ASSERT (List->BackLink != NULL);
+ ASSERT (Node != NULL);
+
+ Count = FixedPcdGet32 (PcdMaximumLinkedListLength);
+ Ptr = List;
+ do {
+ Ptr = Ptr->ForwardLink;
+ Count--;
+ } while ((Ptr != List) && (Ptr != Node) && (Count > 0));
+ Found = (BOOLEAN)(Ptr == Node);
+
+ if (FixedPcdGet32 (PcdMaximumLinkedListLength) > 0) {
+ while ((Count > 0) && (Ptr != List)) {
+ Ptr = Ptr->ForwardLink;
+ }
+ ASSERT (Count > 0);
+ }
+
+ return Found;
+}
+
+/**
+ Initializes the head node of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this function, the other linked list
+ functions may be used to add and remove nodes from the linked list. It is up
+ to the caller of this function to allocate the memory for ListHead.
+
+ If ListHead is NULL, then ASSERT().
+
+ @param ListHead A pointer to the head node of a new doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InitializeListHead (
+ IN OUT LIST_ENTRY *List
+ )
+
+{
+ ASSERT (List != NULL);
+
+ List->ForwardLink = List;
+ List->BackLink = List;
+ return List;
+}
+
+/**
+ Adds a node to the beginning of a doubly linked list, and returns the pointer
+ to the head node of the doubly linked list.
+
+ Adds the node Entry at the beginning of the doubly linked list denoted by
+ ListHead, and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be inserted at the beginning
+ of a doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertHeadList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List->ForwardLink;
+ Entry->BackLink = List;
+ Entry->ForwardLink->BackLink = Entry;
+ List->ForwardLink = Entry;
+ return List;
+}
+
+/**
+ Adds a node to the end of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Adds the node Entry to the end of the doubly linked list denoted by ListHead,
+ and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be added at the end of the
+ doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertTailList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List;
+ Entry->BackLink = List->BackLink;
+ Entry->BackLink->ForwardLink = Entry;
+ List->BackLink = Entry;
+ return List;
+}
+
+/**
+ Retrieves the first node of a doubly linked list.
+
+ Returns the first node of a doubly linked list. List must have been
+ initialized with InitializeListHead(). If List is empty, then NULL is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+
+ @return The first node of a doubly linked list.
+ @retval NULL The list is empty.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetFirstNode (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return List->ForwardLink;
+}
+
+/**
+ Retrieves the next node of a doubly linked list.
+
+ Returns the node of a doubly linked list that follows Node. List must have
+ been initialized with InitializeListHead(). If List is empty, then List is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @return Pointer to the next node if one exists. Otherwise a null value which
+ is actually List is returned.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetNextNode (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return Node->ForwardLink;
+}
+
+/**
+ Checks to see if a doubly linked list is empty or not.
+
+ Checks to see if the doubly linked list is empty. If the linked list contains
+ zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
+
+ If ListHead is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+
+ @retval TRUE The linked list is empty.
+ @retval FALSE The linked list is not empty.
+
+**/
+BOOLEAN
+EFIAPI
+IsListEmpty (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return (BOOLEAN)(List->ForwardLink == List);
+}
+
+/**
+ Determines if a node in a doubly linked list is null.
+
+ Returns FALSE if Node is one of the nodes in the doubly linked list specified
+ by List. Otherwise, TRUE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List and Node is not equal to List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is one of the nodes in the doubly linked list.
+ @retval FALSE Node is not one of the nodes in the doubly linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNull (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(Node == List);
+}
+
+/**
+ Determines if a node the last node in a doubly linked list.
+
+ Returns TRUE if Node is the last node in the doubly linked list specified by
+ List. Otherwise, FALSE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is the last node in the linked list.
+ @retval FALSE Node is not the last node in the linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeAtEnd (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);
+}
+
+/**
+ Swaps the location of two nodes in a doubly linked list, and returns the
+ first node after the swap.
+
+ If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
+ Otherwise, the location of the FirstEntry node is swapped with the location
+ of the SecondEntry node in a doubly linked list. SecondEntry must be in the
+ same double linked list as FirstEntry and that double linked list must have
+ been initialized with InitializeListHead(). SecondEntry is returned after the
+ nodes are swapped.
+
+ If FirstEntry is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT().
+ If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the linked list containing
+ FirstEntry and SecondEntry contains more than PcdMaximumLinkedListLenth
+ nodes, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to another node in the same linked list.
+
+**/
+LIST_ENTRY *
+EFIAPI
+SwapListEntries (
+ IN OUT LIST_ENTRY *FirstEntry,
+ IN OUT LIST_ENTRY *SecondEntry
+ )
+{
+ LIST_ENTRY *Ptr;
+
+ if (FirstEntry == SecondEntry) {
+ return SecondEntry;
+ }
+
+ //
+ // ASSERT Entry1 and Entry2 are in the same linked list
+ //
+ ASSERT (IsNodeInList (FirstEntry, SecondEntry));
+
+ //
+ // Ptr is the node pointed to by FirstEntry->ForwardLink
+ //
+ Ptr = RemoveEntryList (FirstEntry);
+
+ //
+ // If FirstEntry immediately follows SecondEntry, FirstEntry willl be placed
+ // immediately in front of SecondEntry
+ //
+ if (Ptr->BackLink == SecondEntry) {
+ return InsertTailList (SecondEntry, FirstEntry);
+ }
+
+ //
+ // Ptr == SecondEntry means SecondEntry immediately follows FirstEntry,
+ // then there are no further steps necessary
+ //
+ if (Ptr == InsertHeadList (SecondEntry, FirstEntry)) {
+ return Ptr;
+ }
+
+ //
+ // Move SecondEntry to the front of Ptr
+ //
+ RemoveEntryList (SecondEntry);
+ InsertTailList (Ptr, SecondEntry);
+ return SecondEntry;
+}
+
+/**
+ Removes a node from a doubly linked list, and returns the node that follows
+ the removed node.
+
+ Removes the node Entry from a doubly linked list. It is up to the caller of
+ this function to release the memory used by this node if that is required. On
+ exit, the node following Entry in the doubly linked list is returned. If
+ Entry is the only node in the linked list, then the head node of the linked
+ list is returned.
+
+ If Entry is NULL, then ASSERT().
+ If Entry is the head node of an empty list, then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the linked list containing
+ Entry contains more than PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param Entry A pointer to a node in a linked list
+
+ @return Entry
+
+**/
+LIST_ENTRY *
+EFIAPI
+RemoveEntryList (
+ IN CONST LIST_ENTRY *Entry
+ )
+{
+ ASSERT (!IsListEmpty (Entry));
+
+ Entry->ForwardLink->BackLink = Entry->BackLink;
+ Entry->BackLink->ForwardLink = Entry->ForwardLink;
+ return Entry->ForwardLink;
+}
diff --git a/MdePkg/Library/BaseLib/LowBitSet32.c b/MdePkg/Library/BaseLib/LowBitSet32.c new file mode 100644 index 0000000000..5a21245264 --- /dev/null +++ b/MdePkg/Library/BaseLib/LowBitSet32.c @@ -0,0 +1,44 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 32-bit value.
+
+ This function computes the bit position of the lowest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0; (Operand & 1) == 0; BitIndex++, Operand >>= 1);
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/LowBitSet64.c b/MdePkg/Library/BaseLib/LowBitSet64.c new file mode 100644 index 0000000000..a3e5ba0842 --- /dev/null +++ b/MdePkg/Library/BaseLib/LowBitSet64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 64-bit value.
+
+ This function computes the bit position of the lowest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0;
+ (Operand & 1) == 0;
+ BitIndex++, Operand = RShiftU64 (Operand, 1));
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/Math64.c b/MdePkg/Library/BaseLib/Math64.c new file mode 100644 index 0000000000..27d75232c5 --- /dev/null +++ b/MdePkg/Library/BaseLib/Math64.c @@ -0,0 +1,174 @@ +/** @file
+ Leaf math worker functions that require 64-bit arithmetic support from the
+ compiler.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Math64.c
+
+**/
+
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand << Count;
+}
+
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand >> Count;
+}
+
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ //
+ // Test if this compiler supports arithmetic shift
+ //
+ if ((((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1)) == -1) {
+ //
+ // Arithmetic shift is supported
+ //
+ return (UINT64)((INT64)Operand >> Count);
+ }
+
+ //
+ // Arithmetic is not supported
+ //
+ return (Operand >> Count) |
+ ((INTN)Operand < 0 ? ~((UINTN)-1 >> Count) : 0);
+}
+
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand << Count) | (Operand >> (64 - Count));
+}
+
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand >> Count) | (Operand << (64 - Count));
+}
+
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ return (UINT64)(
+ ((UINT64)SwapBytes32 ((UINT32)Operand) << 32) |
+ ((UINT64)SwapBytes32 ((UINT32)(Operand >> 32)))
+ );
+}
+
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return Dividend / Divisor;
+}
+
+UINT64
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return Dividend % Divisor;
+}
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = (UINT32)(Dividend % Divisor);
+ }
+ return Dividend / Divisor;
+}
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
+
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
diff --git a/MdePkg/Library/BaseLib/ModU64x32.c b/MdePkg/Library/BaseLib/ModU64x32.c new file mode 100644 index 0000000000..a8737f43f6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ModU64x32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+ModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathModU64x32 (Dividend, Divisor);
+}
diff --git a/MdePkg/Library/BaseLib/MultS64x64.c b/MdePkg/Library/BaseLib/MultS64x64.c new file mode 100644 index 0000000000..7e8d3184f5 --- /dev/null +++ b/MdePkg/Library/BaseLib/MultS64x64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result.
+
+ This function multiples the 64-bit signed value Multiplicand by the 64-bit
+ signed value Multiplier and generates a 64-bit signed result. This 64-bit
+ signed result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit signed value.
+ @param Multiplier A 64-bit signed value.
+
+ @return Multiplicand * Multiplier
+
+**/
+INT64
+EFIAPI
+MultS64x64 (
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
+ )
+{
+ return (INT64)MultU64x64 (Multiplicand, Multiplier);
+}
diff --git a/MdePkg/Library/BaseLib/MultU64x32.c b/MdePkg/Library/BaseLib/MultU64x32.c new file mode 100644 index 0000000000..4c30472bfa --- /dev/null +++ b/MdePkg/Library/BaseLib/MultU64x32.c @@ -0,0 +1,45 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x32 (Multiplicand, Multiplier);
+ // TODO: ASSERT (Result not overflow);
+ return Result;
+}
diff --git a/MdePkg/Library/BaseLib/MultU64x64.c b/MdePkg/Library/BaseLib/MultU64x64.c new file mode 100644 index 0000000000..6324c3e335 --- /dev/null +++ b/MdePkg/Library/BaseLib/MultU64x64.c @@ -0,0 +1,45 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x64 (Multiplicand, Multiplier);
+ // TODO: ASSERT (Result not overflow);
+ return Result;
+}
diff --git a/MdePkg/Library/BaseLib/RRotU32.c b/MdePkg/Library/BaseLib/RRotU32.c new file mode 100644 index 0000000000..93dda94b9f --- /dev/null +++ b/MdePkg/Library/BaseLib/RRotU32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
+ with the low bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT32
+EFIAPI
+RRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand >> Count) | (Operand << (32 - Count));
+}
diff --git a/MdePkg/Library/BaseLib/RRotU64.c b/MdePkg/Library/BaseLib/RRotU64.c new file mode 100644 index 0000000000..d55bbfc79f --- /dev/null +++ b/MdePkg/Library/BaseLib/RRotU64.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
+ with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+RRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRRotU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/RShiftU64.c b/MdePkg/Library/BaseLib/RShiftU64.c new file mode 100644 index 0000000000..f9ae4f6efa --- /dev/null +++ b/MdePkg/Library/BaseLib/RShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
+ filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+RShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/SetJumpLongJump.c b/MdePkg/Library/BaseLib/SetJumpLongJump.c new file mode 100644 index 0000000000..a2381251f3 --- /dev/null +++ b/MdePkg/Library/BaseLib/SetJumpLongJump.c @@ -0,0 +1,40 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetJumpLongJump.c
+
+**/
+
+
+
+UINTN
+EFIAPI
+SetJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ ASSERT (JumpBuffer != NULL);
+ ASSERT (FALSE);
+ return 0;
+}
+
+VOID
+EFIAPI
+LongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ ASSERT (JumpBuffer != NULL);
+ ASSERT (Value != 0);
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/String.c b/MdePkg/Library/BaseLib/String.c new file mode 100644 index 0000000000..fb39a22a42 --- /dev/null +++ b/MdePkg/Library/BaseLib/String.c @@ -0,0 +1,798 @@ +/** @file
+ Unicode string primatives.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: String.c
+
+**/
+
+/**
+ Copies one Null-terminated Unicode string to another Null-terminated Unicode
+ string and returns the new Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destiantion
+
+**/
+CHAR16 *
+EFIAPI
+StrCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ )
+{
+ CHAR16 *ReturnValue;
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) > StrLen (Source));
+
+ ReturnValue = Destination;
+ while (*Source) {
+ *(Destination++) = *(Source++);
+ }
+ *Destination = 0;
+ return ReturnValue;
+}
+
+/**
+ Copies one Null-terminated Unicode string with a maximum length to another
+ Null-terminated Unicode string with a maximum length and returns the new
+ Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. At most, Length Unicode
+ characters are copied from Source to Destination. If Length is 0, then
+ Destination is returned unmodified. If Length is greater that the number of
+ Unicode characters in Source, then Destination is padded with Null Unicode
+ characters. If Source and Destination overlap, then the results are
+ undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to copy.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ )
+{
+ CHAR16 *ReturnValue;
+
+ if (Length == 0) {
+ return Destination;
+ }
+
+ //
+ // Destination cannot be NULL if Length is not zero
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ // Q: Does Source have to be NULL-terminated?
+ //
+ ASSERT ((UINTN)(Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) >= Length);
+
+ ReturnValue = Destination;
+
+ while ((*Source != L'\0') && (Length > 1)) {
+ *(Destination++) = *(Source++);
+ Length--;
+ }
+
+ ZeroMem (Destination, Length * sizeof (*Destination));
+ return ReturnValue;
+}
+
+/**
+ Returns the length of a Null-terminated Unicode string.
+
+ This function returns the number of Unicode characters in the Null-terminated
+ Unicode string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+StrLen (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Length;
+
+ ASSERT (String != NULL);
+
+ for (Length = 0; *String != L'\0'; String++, Length++) {
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length should not more than PcdMaximumUnicodeStringLength
+ //
+ if (FixedPcdGet32 (PcdMaximumUnicodeStringLength) != 0) {
+ ASSERT (Length < FixedPcdGet32 (PcdMaximumUnicodeStringLength));
+ }
+ }
+ return Length;
+}
+
+/**
+ Returns the size of a Null-terminated Unicode string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated Unicode
+ string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+StrSize (
+ IN CONST CHAR16 *String
+ )
+{
+ return (StrLen (String) + 1) * sizeof (*String);
+}
+
+/**
+ Compares two Null-terminated Unicode strings, and returns the difference
+ between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched Unicode character in SecondString subtracted from the first
+ mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumUnicodeStringLength
+ //
+ ASSERT (StrSize (FirstString) != 0);
+ ASSERT (StrSize (SecondString) != 0);
+
+ while ((*FirstString != L'\0') && (*FirstString == *SecondString)) {
+ FirstString++;
+ SecondString++;
+ }
+ return *FirstString - *SecondString;
+}
+
+/**
+ Compares two Null-terminated Unicode strings with maximum lengths, and
+ returns the difference between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. At most, Length Unicode
+ characters will be compared. If Length is 0, then 0 is returned. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched Unicode character in SecondString
+ subtracted from the first mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to compare.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrnCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+
+ //
+ // ASSERT both strings are less long than PcdMaximumUnicodeStringLength.
+ // Length tests are performed inside StrLen().
+ //
+ ASSERT (StrSize (FirstString) != 0);
+ ASSERT (StrSize (SecondString) != 0);
+
+ while ((*FirstString != L'\0') &&
+ (*FirstString != *SecondString) &&
+ (Length > 1)) {
+ FirstString++;
+ SecondString++;
+ Length--;
+ }
+
+ return *FirstString - *SecondString;
+}
+
+/**
+ Concatenates one Null-terminated Unicode string to another Null-terminated
+ Unicode string, and returns the concatenated Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination. The Null-terminated concatenated
+ Unicode String is returned. If Source and Destination overlap, then the
+ results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ )
+{
+ StrCpy (Destination + StrLen (Destination), Source);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (StrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Concatenates one Null-terminated Unicode string with a maximum length to the
+ end of another Null-terminated Unicode string, and returns the concatenated
+ Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination, and Destination is returned. At
+ most, Length Unicode characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ )
+{
+ StrnCpy (Destination + StrLen (Destination), Source, Length);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (StrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Copies one Null-terminated ASCII string to another Null-terminated ASCII
+ string and returns the new ASCII string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ )
+{
+ CHAR8 *ReturnValue;
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) > AsciiStrLen (Source));
+
+ ReturnValue = Destination;
+ while (*Source) {
+ *(Destination++) = *(Source++);
+ }
+ *Destination = 0;
+ return ReturnValue;
+}
+
+/**
+ Copies one Null-terminated ASCII string with a maximum length to another
+ Null-terminated ASCII string with a maximum length and returns the new ASCII
+ string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. At most, Length ASCII characters
+ are copied from Source to Destination. If Length is 0, then Destination is
+ returned unmodified. If Length is greater that the number of ASCII characters
+ in Source, then Destination is padded with Null ASCII characters. If Source
+ and Destination overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to copy.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ )
+{
+ CHAR8 *ReturnValue;
+
+ if (Length == 0) {
+ return Destination;
+ }
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) >= Length);
+
+ ReturnValue = Destination;
+
+ while (*Source && Length > 1) {
+ *(Destination++) = *(Source++);
+ Length--;
+ }
+
+ ZeroMem (Destination, Length * sizeof (*Destination));
+ return ReturnValue;
+}
+
+/**
+ Returns the length of a Null-terminated ASCII string.
+
+ This function returns the number of ASCII characters in the Null-terminated
+ ASCII string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrLen (
+ IN CONST CHAR8 *String
+ )
+{
+ UINTN Length;
+
+ ASSERT (String != NULL);
+
+ for (Length = 0; *String != '\0'; String++, Length++) {
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length should not more than PcdMaximumUnicodeStringLength
+ //
+ if (FixedPcdGet32 (PcdMaximumAsciiStringLength) != 0) {
+ ASSERT (Length < FixedPcdGet32 (PcdMaximumAsciiStringLength));
+ }
+ }
+ return Length;
+}
+
+/**
+ Returns the size of a Null-terminated ASCII string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated ASCII string
+ specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrSize (
+ IN CONST CHAR8 *String
+ )
+{
+ return (AsciiStrLen (String) + 1) * sizeof (*String);
+}
+
+/**
+ Compares two Null-terminated ASCII strings, and returns the difference
+ between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched ASCII character in SecondString subtracted from the first
+ mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') && (*FirstString == *SecondString)) {
+ FirstString++;
+ SecondString++;
+ }
+
+ return *FirstString - *SecondString;
+}
+
+STATIC
+CHAR8
+EFIAPI
+AsciiToUpper (
+ IN CHAR8 Chr
+ )
+{
+ return (Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr;
+}
+
+/**
+ Performs a case insensitive comparison of two Null-terminated ASCII strings,
+ and returns the difference between the first mismatched ASCII characters.
+
+ This function performs a case insensitive comparison of the Null-terminated
+ ASCII string FirstString to the Null-terminated ASCII string SecondString. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched lower case ASCII character in
+ SecondString subtracted from the first mismatched lower case ASCII character
+ in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString using case insensitive
+ comparisons.
+ @retval !=0 FirstString is not identical to SecondString using case
+ insensitive comparisons.
+
+**/
+INTN
+EFIAPI
+AsciiStriCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') &&
+ (AsciiToUpper (*FirstString) == AsciiToUpper (*SecondString))) {
+ FirstString++;
+ SecondString++;
+ }
+
+ return AsciiToUpper (*FirstString) - AsciiToUpper (*SecondString);
+}
+
+/**
+ Compares two Null-terminated ASCII strings with maximum lengths, and returns
+ the difference between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. At most, Length ASCII characters
+ will be compared. If Length is 0, then 0 is returned. If FirstString is
+ identical to SecondString, then 0 is returned. Otherwise, the value returned
+ is the first mismatched ASCII character in SecondString subtracted from the
+ first mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrnCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString,
+ IN UINTN Length
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') &&
+ (*FirstString != *SecondString) &&
+ (Length > 1)) {
+ FirstString++;
+ SecondString++;
+ Length--;
+ }
+ return *FirstString - *SecondString;
+}
+
+/**
+ Concatenates one Null-terminated ASCII string to another Null-terminated
+ ASCII string, and returns the concatenated ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents of
+ Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination. The Null-terminated concatenated ASCII
+ String is returned.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ )
+{
+ AsciiStrCpy (Destination + AsciiStrLen (Destination), Source);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (AsciiStrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Concatenates one Null-terminated ASCII string with a maximum length to the
+ end of another Null-terminated ASCII string, and returns the concatenated
+ ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents
+ of Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination, and Destination is returned. At most,
+ Length ASCII characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Destination contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ )
+{
+ AsciiStrnCpy (Destination + AsciiStrLen (Destination), Source, Length);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (AsciiStrSize (Destination) != 0);
+ return Destination;
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes16.c b/MdePkg/Library/BaseLib/SwapBytes16.c new file mode 100644 index 0000000000..c8460a28f7 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes16.c @@ -0,0 +1,36 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 16-bit integer.
+
+ This function swaps the bytes in a 16-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 16-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT16
+EFIAPI
+SwapBytes16 (
+ IN UINT16 Operand
+ )
+{
+ return (Operand << 8) | (Operand >> 8);
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes32.c b/MdePkg/Library/BaseLib/SwapBytes32.c new file mode 100644 index 0000000000..4e683b09d1 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes32.c @@ -0,0 +1,39 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 32-bit integer.
+
+ This function swaps the bytes in a 32-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 32-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT32
+EFIAPI
+SwapBytes32 (
+ IN UINT32 Operand
+ )
+{
+ return (UINT32)(
+ ((UINT32)SwapBytes16 ((UINT16)Operand) << 16) |
+ ((UINT32)SwapBytes16 ((UINT16)(Operand >> 16)))
+ );
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes64.c b/MdePkg/Library/BaseLib/SwapBytes64.c new file mode 100644 index 0000000000..1b0882fc9a --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes64.c @@ -0,0 +1,36 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+SwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ return InternalMathSwapBytes64 (Operand);
+}
diff --git a/MdePkg/Library/BaseLib/SwitchStack.c b/MdePkg/Library/BaseLib/SwitchStack.c new file mode 100644 index 0000000000..73b8edb1af --- /dev/null +++ b/MdePkg/Library/BaseLib/SwitchStack.c @@ -0,0 +1,52 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ //
+ // This version of this function does not actually change the stack pointer
+ // This is to support compilation of CPU types that do not support assemblers
+ // such as EBC
+ //
+ EntryPoint (Context1, Context2);
+}
diff --git a/MdePkg/Library/BaseLib/Synchronization.c b/MdePkg/Library/BaseLib/Synchronization.c new file mode 100644 index 0000000000..df395869a2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Synchronization.c @@ -0,0 +1,353 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+#define SPIN_LOCK_RELEASED ((SPIN_LOCK)0)
+#define SPIN_LOCK_ACQUIRED ((SPIN_LOCK)-1)
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ );
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ );
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN volatile UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ );
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ *SpinLock = 0;
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (FixedPcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ FixedPcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ return (BOOLEAN)(
+ InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ ) == (VOID*)SPIN_LOCK_RELEASED
+ );
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ *SpinLock = 0;
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ switch (sizeof (*Value)) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Unaligned.c b/MdePkg/Library/BaseLib/Unaligned.c new file mode 100644 index 0000000000..9d0521e595 --- /dev/null +++ b/MdePkg/Library/BaseLib/Unaligned.c @@ -0,0 +1,203 @@ +/** @file
+ Unaligned access functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ return *Buffer;
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return *Buffer & 0xffffff;
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ return *Buffer = BitFieldWrite32 (*Buffer, 0, 23, Value);
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return *Buffer;
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ return *Buffer;
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ return *Buffer = Value;
+}
diff --git a/MdePkg/Library/BaseLib/build.xml b/MdePkg/Library/BaseLib/build.xml new file mode 100644 index 0000000000..7533da8ddc --- /dev/null +++ b/MdePkg/Library/BaseLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseLib">
+ <GenBuild baseName="BaseLib" mbdFilename="${MODULE_DIR}\BaseLib.mbd" msaFilename="${MODULE_DIR}\BaseLib.msa"/>
+ </target>
+ <target depends="BaseLib_clean" name="clean"/>
+ <target depends="BaseLib_cleanall" name="cleanall"/>
+ <target name="BaseLib_clean">
+ <OutputDirSetup baseName="BaseLib" mbdFilename="${MODULE_DIR}\BaseLib.mbd" msaFilename="${MODULE_DIR}\BaseLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseLib_cleanall">
+ <OutputDirSetup baseName="BaseLib" mbdFilename="${MODULE_DIR}\BaseLib.mbd" msaFilename="${MODULE_DIR}\BaseLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ia32/ARShiftU64.asm b/MdePkg/Library/BaseLib/ia32/ARShiftU64.asm new file mode 100644 index 0000000000..6b9cfa18a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ARShiftU64.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ARShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit arithmetic right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathARShiftU64 PROC
+ mov cl, [esp + 12]
+ mov eax, [esp + 8]
+ cdq
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ sar edx, cl
+ ret
+InternalMathARShiftU64 ENDP
+
+ END
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ia32/ARShiftU64.s b/MdePkg/Library/BaseLib/ia32/ARShiftU64.s new file mode 100644 index 0000000000..d6af974d0f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ARShiftU64.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ARShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit arithmetic right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _ARShiftU64
+_ARShiftU64:
+ movb 12(%esp),%cl
+ movl 8(%esp),%eax
+ cltd
+ testb $32,%cl
+# MISMATCH: " cmovz edx, eax"
+ cmovz %eax, %edx
+# MISMATCH: " cmovz eax, [esp + 4]"
+ cmovz 4(%esp), %eax
+ shrdl %cl,%edx,%eax
+ sar %cl,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.asm new file mode 100644 index 0000000000..a4d397874d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuBreakpoint PROC
+ int 3
+ ret
+_CpuBreakpoint ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.s b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.s new file mode 100644 index 0000000000..e5d18c35b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuBreakpoint.s
+#
+# Abstract:
+#
+# CpuBreakpoint function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuBreakpoint (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuBreakpoint
+_CpuBreakpoint:
+ int 3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.asm b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.asm new file mode 100644 index 0000000000..de87ad75e9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuFlushTlb PROC
+ mov eax, cr3
+ mov cr3, eax
+ ret
+_CpuFlushTlb ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.s b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.s new file mode 100644 index 0000000000..1d85fa77da --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuFlushTlb.Asm
+#
+# Abstract:
+#
+# CpuFlushTlb function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuFlushTlb (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuFlushTlb
+_CpuFlushTlb:
+ movl %cr3, %eax
+ movl %eax, %cr3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuId.asm b/MdePkg/Library/BaseLib/ia32/CpuId.asm new file mode 100644 index 0000000000..2c94e3a1ae --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuId.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; )
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 16]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ pop [ecx]
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuId.s b/MdePkg/Library/BaseLib/ia32/CpuId.s new file mode 100644 index 0000000000..989daba127 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuId.s @@ -0,0 +1,63 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.Asm
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmCpuid (
+# IN UINT32 RegisterInEax,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+.globl _AsmCpuid
+_AsmCpuid:
+ push %ebx
+ push %edi
+ movl 12(%esp),%eax
+ cpuid
+ movl %ecx,%edi
+ movl 16(%esp),%ecx
+ jecxz L1
+ movl %eax,(%ecx)
+L1:
+ movl 20(%esp),%ecx
+ jecxz L2
+ movl %ebx,(%ecx)
+L2:
+ movl 24(%esp),%ecx
+ jecxz L3
+ movl %edi,(%ecx)
+L3:
+ movl 28(%esp),%ecx
+ jecxz L4
+ movl %edx,(%ecx)
+L4:
+ pop %edi
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/ia32/CpuPause.asm b/MdePkg/Library/BaseLib/ia32/CpuPause.asm new file mode 100644 index 0000000000..79a4f2f67b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuPause.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuPause PROC
+ pause
+ ret
+_CpuPause ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuPause.s b/MdePkg/Library/BaseLib/ia32/CpuPause.s new file mode 100644 index 0000000000..ace2c6764a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuPause.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuPause.Asm
+#
+# Abstract:
+#
+# CpuPause function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuPause (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuPause
+_CpuPause:
+ pause
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuSleep.asm b/MdePkg/Library/BaseLib/ia32/CpuSleep.asm new file mode 100644 index 0000000000..66fb90e903 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuSleep.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuSleep PROC
+ hlt
+ ret
+_CpuSleep ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuSleep.s b/MdePkg/Library/BaseLib/ia32/CpuSleep.s new file mode 100644 index 0000000000..9b7713128f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuSleep.s @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuSleep.Asm
+#
+# Abstract:
+#
+# CpuSleep function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuSleep (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuSleep
+_CpuSleep:
+ hlt
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DisableInterrupts.asm b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.asm new file mode 100644 index 0000000000..74bdd0bd98 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_DisableInterrupts PROC
+ cli
+ ret
+_DisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DisableInterrupts.s b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.s new file mode 100644 index 0000000000..cc9c95c30f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisableInterrupts.Asm
+#
+# Abstract:
+#
+# DisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# DisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _DisableInterrupts
+_DisableInterrupts:
+ cli
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DisablePaging32.asm b/MdePkg/Library/BaseLib/ia32/DisablePaging32.asm new file mode 100644 index 0000000000..04ae8cf514 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging32.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86DisablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86DisablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DisablePaging32.s b/MdePkg/Library/BaseLib/ia32/DisablePaging32.s new file mode 100644 index 0000000000..21e8a82c0e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisablePaging32.s @@ -0,0 +1,58 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisablePaging32.Asm
+#
+# Abstract:
+#
+# AsmDisablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmDisablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+.global _AsmDisablePaging32
+_AsmDisablePaging32:
+ movl 4(%esp),%ebx
+ movl 8(%esp),%ecx
+ movl 12(%esp),%edx
+ pushfl
+ popl %edi
+ cli
+ movl %cr0, %eax
+ btrl $31,%eax
+ movl 16(%esp),%esp
+ movl %eax, %cr0
+ pushl %edi
+ popfl
+ pushl %edx
+ pushl %ecx
+ call *%ebx
+ jmp .
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/ia32/DivS64x64Remainder.c new file mode 100644 index 0000000000..219f48f321 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivS64x64Remainder.c @@ -0,0 +1,38 @@ +/** @file
+ Integer division worker functions for Ia32.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DivS64x64Remainder.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ )
+{
+ INT64 Quot;
+
+ Quot = InternalMathDivRemU64x64 (
+ Dividend >= 0 ? Dividend : -Dividend,
+ Divisor >= 0 ? Divisor : -Divisor,
+ (UINT64 *) Remainder
+ );
+ if (Remainder != NULL && Dividend < 0) {
+ *Remainder = -*Remainder;
+ }
+ return (Dividend ^ Divisor) >= 0 ? Quot : -Quot;
+}
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32.asm b/MdePkg/Library/BaseLib/ia32/DivU64x32.asm new file mode 100644 index 0000000000..1ad5474586 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathDivU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, [esp + 8]
+ div ecx
+ pop edx
+ ret
+InternalMathDivU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32.s b/MdePkg/Library/BaseLib/ia32/DivU64x32.s new file mode 100644 index 0000000000..689c7092c0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _DivU64x32
+_DivU64x32:
+ movl 8(%esp),%eax
+ movl 12(%esp),%ecx
+ xorl %edx,%edx
+ divl %ecx
+ pushl %eax
+ movl 8(%esp),%eax
+ divl %ecx
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.asm b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.asm new file mode 100644 index 0000000000..f1c6c1f4ac --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivError.asm
+;
+; Abstract:
+;
+; Set error flag for all division functions
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathDivRemU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, [esp + 8]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, [esp + 8]
+ div ecx
+ mov ecx, [esp + 20]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ pop edx
+ ret
+InternalMathDivRemU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.s b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.s new file mode 100644 index 0000000000..1f34f18255 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivError.asm
+#
+# Abstract:
+#
+# Set error flag for all division functions
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _InternalMathDivRemU64x32
+_InternalMathDivRemU64x32:
+ movl 12(%esp),%ecx
+ movl 8(%esp),%eax
+ xorl %edx,%edx
+ divl %ecx
+ pushl %eax
+ movl 8(%esp),%eax
+ divl %ecx
+ movl 20(%esp),%ecx
+ jecxz L1
+ movl %edx,(%ecx)
+L1:
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.asm b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.asm new file mode 100644 index 0000000000..261211b946 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.asm @@ -0,0 +1,83 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x64Remainder.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+; both the quotient and the remainder
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+EXTERN InternalMathDivRemU64x32:PROC
+
+InternalMathDivRemU64x64 PROC
+ mov ecx, [esp + 16]
+ test ecx, ecx
+ jnz _@DivRemU64x64
+ mov ecx, [esp + 20]
+ jecxz @F
+ and dword ptr [ecx + 4], 0
+ mov [esp + 16], ecx
+@@:
+ jmp InternalMathDivRemU64x32
+InternalMathDivRemU64x64 ENDP
+
+_@DivRemU64x64 PROC USES ebx esi edi
+ mov edx, dword ptr [esp + 20]
+ mov eax, dword ptr [esp + 16]
+ mov edi, edx
+ mov esi, eax
+ mov ebx, dword ptr [esp + 24]
+@@:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz @B
+ div ebx
+ mov ebx, eax
+ mov ecx, [esp + 28]
+ mul dword ptr [esp + 24]
+ imul ecx, ebx
+ add edx, ecx
+ mov ecx, dword ptr [esp + 32]
+ jc @TooLarge
+ cmp edi, edx
+ ja @Correct
+ jb @TooLarge
+ cmp esi, eax
+ jae @Correct
+@TooLarge:
+ dec ebx
+ jecxz @Return
+ sub eax, dword ptr [esp + 24]
+ sbb edx, dword ptr [esp + 28]
+@Correct:
+ jecxz @Return
+ sub esi, eax
+ sbb edi, edx
+ mov [ecx], esi
+ mov [ecx + 4], edi
+@Return:
+ mov eax, ebx
+ xor edx, edx
+ ret
+_@DivRemU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.s b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.s new file mode 100644 index 0000000000..f604f7c72e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.s @@ -0,0 +1,89 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x64Remainder.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+# both the quotient and the remainder
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.extern _InternalMathDivRemU64x32
+
+.global _InternalMathDivRemU64x64
+_InternalMathDivRemU64x64:
+ movl 16(%esp),%ecx
+ testl %ecx,%ecx
+ jnz _DivRemU64x64
+ movl 20(%esp),%ecx
+ jecxz L1
+ and $0,4(%ecx)
+ movl %ecx,16(%esp)
+L1:
+ jmp _InternalMathDivRemU64x32
+
+
+.global DivRemU64x64
+DivRemU64x64:
+# MISMATCH: "DivRemU64x64: USES ebx esi edi"
+ push %ebx
+ push %esi
+ push %edi
+ mov 20(%esp), %edx
+ mov 16(%esp), %eax
+ movl %edx,%edi
+ movl %eax,%esi
+ mov 24(%esp), %ebx
+L2:
+ shrl %edx
+ rcrl $1,%eax
+ shrdl $1,%ecx,%ebx
+ shrl %ecx
+ jnz L2
+ divl %ebx
+ movl %eax,%ebx
+ movl 28(%esp),%ecx
+ mull 24(%esp)
+ imull %ebx,%ecx
+ addl %ecx,%edx
+ mov 32(%esp), %ecx
+ jc TooLarge
+ cmpl %edx,%edi
+ ja Correct
+ jb TooLarge
+ cmpl %eax,%esi
+ jae Correct
+TooLarge:
+ decl %ebx
+ jecxz Return
+ sub 24(%esp), %eax
+ sbb 28(%esp), %edx
+Correct:
+ jecxz Return
+ subl %eax,%esi
+ sbbl %edx,%edi
+ movl %esi,(%ecx)
+ movl %edi,4(%ecx)
+Return:
+ movl %ebx,%eax
+ xorl %edx,%edx
+ push %edi
+ push %esi
+ push %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..fe2016da87 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+_EnableDisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.s b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.s new file mode 100644 index 0000000000..80362a95b2 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableDisableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableDisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableDisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _EnableDisableInterrupts
+_EnableDisableInterrupts:
+ sti
+ cli
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/EnableInterrupts.asm b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.asm new file mode 100644 index 0000000000..194dd8f935 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableInterrupts PROC
+ sti
+ ret
+_EnableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnableInterrupts.s b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.s new file mode 100644 index 0000000000..74413d83b6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _EnableInterrupts
+_EnableInterrupts:
+ sti
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging32.asm b/MdePkg/Library/BaseLib/ia32/EnablePaging32.asm new file mode 100644 index 0000000000..cf6f2fe458 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging32.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86EnablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging32.s b/MdePkg/Library/BaseLib/ia32/EnablePaging32.s new file mode 100644 index 0000000000..6f9befcb4a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging32.s @@ -0,0 +1,58 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging32.Asm
+#
+# Abstract:
+#
+# AsmEnablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmEnablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+.global _AsmEnablePaging32
+_AsmEnablePaging32:
+ movl 4(%esp),%ebx
+ movl 8(%esp),%ecx
+ movl 12(%esp),%edx
+ pushfl
+ popl %edi
+ cli
+ movl %cr0, %eax
+ btsl $31,%eax
+ movl 16(%esp),%esp
+ movl %eax, %cr0
+ pushl %edi
+ popfl
+ pushl %edx
+ pushl %ecx
+ call *%ebx
+ jmp .
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging64.asm b/MdePkg/Library/BaseLib/ia32/EnablePaging64.asm new file mode 100644 index 0000000000..6c9b0ea76b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging64.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+ .code
+
+InternalX86EnablePaging64 PROC
+ cli
+ mov [esp], @F ; offset for far retf
+ mov eax, cr4
+ or al, (1 SHL 5)
+ mov cr4, eax ; enable PAE
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov eax, cr0
+ bts eax, 31
+ mov cr0, eax ; enable paging
+ retf
+@@: ; long mode starts here
+ DB 67h, 48h
+ mov ebx, [esp] ; mov rbx, [esp]
+ DB 67h, 48h
+ mov ecx, [esp + 8] ; mov rcx, [esp + 8]
+ DB 67h, 48h
+ mov edx, [esp + 10h] ; mov rdx, [esp + 10h]
+ DB 67h, 48h
+ mov esp, [esp + 18h] ; mov rsp, [esp + 18h]
+ DB 48h
+ add esp, -20h ; add rsp, -20h
+ call ebx ; call rbx
+ jmp $
+InternalX86EnablePaging64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging64.s b/MdePkg/Library/BaseLib/ia32/EnablePaging64.s new file mode 100644 index 0000000000..b365ea762a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging64.s @@ -0,0 +1,66 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging64.Asm
+#
+# Abstract:
+#
+# AsmEnablePaging64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+ #.MODEL flat
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmEnablePaging64 (
+# IN UINT16 CodeSelector,
+# IN UINT64 EntryPoint,
+# IN UINT64 Context1, OPTIONAL
+# IN UINT64 Context2, OPTIONAL
+# IN UINT64 NewStack
+# );
+#------------------------------------------------------------------------------
+.global _AsmEnablePaging64
+_AsmEnablePaging64:
+ cli
+ movl $$LongStart, (%esp)
+ movl %cr4, %eax
+ orb $0x20, %al
+ movl %eax, %cr4 # enable PAE
+ movl $0xc0000080, %ecx
+ rdmsr
+ orb $1, %ah # set LME
+ wrmsr
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl %eax, %cr0 # enable paging
+ lret
+LongStart: # long mode starts here
+ .byte 0x67,0x48
+ movl (%esp), %ebx # mov rbx, [esp]
+ .byte 0x67,0x48
+ movl 8(%esp), %ecx # mov rcx, [esp + 8]
+ .byte 0x67,0x48
+ movl 0x10(%esp), %edx # mov rdx, [esp + 10h]
+ .byte 0x67,0x48
+ movl 0x18(%esp), %esp # mov rsp, [esp + 18h]
+ .byte 0x48
+ addl $0x-20, %esp # add rsp, -20h
+ call *%ebx # call rbx
+ jmp .
diff --git a/MdePkg/Library/BaseLib/ia32/FlushCacheLine.asm b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.asm new file mode 100644 index 0000000000..d79f217610 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+_AsmFlushCacheLine PROC
+ mov eax, [esp + 4]
+ clflush [eax]
+ ret
+_AsmFlushCacheLine ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/FlushCacheLine.s b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.s new file mode 100644 index 0000000000..c14bd11d68 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FlushCacheLine.Asm
+#
+# Abstract:
+#
+# AsmFlushCacheLine function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFlushCacheLine (
+# IN VOID *LinearAddress
+# );
+#------------------------------------------------------------------------------
+.global _AsmFlushCacheLine
+_AsmFlushCacheLine:
+ movl 4(%esp),%eax
+ clflush (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/FxRestore.asm b/MdePkg/Library/BaseLib/ia32/FxRestore.asm new file mode 100644 index 0000000000..e9e37d1384 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxRestore.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxRestore PROC
+ mov eax, [esp + 4]
+ fxrstor [eax]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/FxRestore.s b/MdePkg/Library/BaseLib/ia32/FxRestore.s new file mode 100644 index 0000000000..631a3ef68a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxRestore.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxRestore.Asm
+#
+# Abstract:
+#
+# AsmFxRestore function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFxRestore (
+# IN CONST IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+.global _AsmFxRestore
+_AsmFxRestore:
+ movl 4(%esp),%eax
+ fxrstor (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/FxSave.asm b/MdePkg/Library/BaseLib/ia32/FxSave.asm new file mode 100644 index 0000000000..22496c5e57 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxSave.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxSave PROC
+ mov eax, [esp + 4]
+ fxsave [eax]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/FxSave.s b/MdePkg/Library/BaseLib/ia32/FxSave.s new file mode 100644 index 0000000000..44a55126a9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxSave.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxSave.Asm
+#
+# Abstract:
+#
+# AsmFxSave function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFxSave (
+# OUT IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+.global _AsmFxSave
+_AsmFxSave:
+ movl 4(%esp),%eax
+ fxsave (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.asm b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..c8c20fbc92 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov ecx, [esp + 4]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ lock cmpxchg [ecx], edx
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.s b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.s new file mode 100644 index 0000000000..43bb92526e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.s @@ -0,0 +1,64 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange32.Asm
+#
+# Abstract:
+#
+# InterlockedCompareExchange32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InterlockedCompareExchangePointer (
+# IN VOID **Value,
+# IN VOID *CompareValue,
+# IN VOID *ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedCompareExchangePointer
+_InterlockedCompareExchangePointer:
+ #
+ # InterlockedCompareExchangePointer() shares the same code as
+ # InterlockedCompareExchange32() on IA32 and thus no code inside this
+ # function
+ #
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedCompareExchange32 (
+# IN UINT32 *Value,
+# IN UINT32 CompareValue,
+# IN UINT32 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedCompareExchange32
+_InterlockedCompareExchange32:
+ movl 4(%esp),%ecx
+ movl 8(%esp),%eax
+ movl 12(%esp),%edx
+ lock cmpxchgl %edx,(%ecx)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.asm b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..cded9206b8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InterlockedCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC USES esi ebx
+ mov esi, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov ebx, [esp + 24]
+ mov ecx, [esp + 28]
+ lock cmpxchg8b qword ptr [esi]
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.s b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.s new file mode 100644 index 0000000000..abc51e905b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.s @@ -0,0 +1,52 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange64.Asm
+#
+# Abstract:
+#
+# InterlockedCompareExchange64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InterlockedCompareExchange64 (
+# IN UINT64 *Value,
+# IN UINT64 CompareValue,
+# IN UINT64 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedCompareExchange64
+ push %esi
+ push %ebx
+ movl 12(%esp),%esi
+ movl 16(%esp),%eax
+ movl 20(%esp),%edx
+ movl 24(%esp),%ebx
+ movl 28(%esp),%ecx
+ lock
+ cmpxchg8b (%esi)
+ pop %ebx
+ pop %esi
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.asm b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.asm new file mode 100644 index 0000000000..d8495405c0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ mov eax, [esp + 4]
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.s b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.s new file mode 100644 index 0000000000..a7b653ac20 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.s @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedDecrement.Asm
+#
+# Abstract:
+#
+# InterlockedDecrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedDecrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedDecrement
+_InterlockedDecrement:
+ movl 4(%esp),%eax
+ lock
+ decl (%eax)
+ movl (%eax),%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.asm b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.asm new file mode 100644 index 0000000000..a7bfb6fccd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ mov eax, [esp + 4]
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.s b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.s new file mode 100644 index 0000000000..3f9beec211 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.s @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedIncrement.Asm
+#
+# Abstract:
+#
+# InterlockedIncrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedIncrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedIncrement
+_InterlockedIncrement:
+ movl 4(%esp),%eax
+ lock
+ incl (%eax)
+ movl (%eax),%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Invd.asm b/MdePkg/Library/BaseLib/ia32/Invd.asm new file mode 100644 index 0000000000..5767f54848 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Invd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmInvd PROC
+ invd
+ ret
+_AsmInvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Invd.s b/MdePkg/Library/BaseLib/ia32/Invd.s new file mode 100644 index 0000000000..6d6c8d46cd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Invd.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Invd.Asm
+#
+# Abstract:
+#
+# AsmInvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmInvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmInvd
+_AsmInvd:
+ invd
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/LRotU64.asm b/MdePkg/Library/BaseLib/ia32/LRotU64.asm new file mode 100644 index 0000000000..1d5562a799 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LRotU64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LRotU64.asm
+;
+; Abstract:
+;
+; 64-bit left rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathLRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathLRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/LRotU64.s b/MdePkg/Library/BaseLib/ia32/LRotU64.s new file mode 100644 index 0000000000..9c961ce378 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LRotU64.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LRotU64.asm
+#
+# Abstract:
+#
+# 64-bit left rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _LRotU64
+ push %ebx
+ movb 16(%esp),%cl
+ movl 12(%esp),%edx
+ movl 8(%esp),%eax
+ shldl %cl,%edx,%ebx
+ shldl %cl,%eax,%edx
+ rorl %cl,%ebx
+ shldl %cl,%ebx,%eax
+ testb $32,%cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/LShiftU64.asm b/MdePkg/Library/BaseLib/ia32/LShiftU64.asm new file mode 100644 index 0000000000..9ce946ddd1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LShiftU64.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit left shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathLShiftU64 PROC
+ mov cl, [esp + 12]
+ xor eax, eax
+ mov edx, [esp + 4]
+ test cl, 32
+ cmovz eax, edx
+ cmovz edx, [esp + 8]
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+InternalMathLShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/LShiftU64.s b/MdePkg/Library/BaseLib/ia32/LShiftU64.s new file mode 100644 index 0000000000..94cbc12265 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LShiftU64.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit left shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _LShiftU64
+_LShiftU64:
+ movb 12(%esp),%cl
+ xorl %eax,%eax
+ movl 4(%esp),%edx
+ testb $32,%cl
+ cmovz %edx, %eax
+ cmovz 8(%esp), %edx
+ shldl %cl,%eax,%edx
+ shll %cl,%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/LongJump.asm b/MdePkg/Library/BaseLib/ia32/LongJump.asm new file mode 100644 index 0000000000..ff0cef2273 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LongJump.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of LongJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+_LongJump PROC
+ pop eax
+ pop edx
+ pop eax
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20]
+_LongJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/LongJump.s b/MdePkg/Library/BaseLib/ia32/LongJump.s new file mode 100644 index 0000000000..3da09142fc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LongJump.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LongJump.Asm
+#
+# Abstract:
+#
+# Implementation of LongJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _LongJump
+_LongJump:
+ popl %eax
+ popl %edx
+ popl %eax
+ movl (%edx),%ebx
+ movl 4(%edx),%esi
+ movl 8(%edx),%edi
+ movl 12(%edx),%ebp
+ movl 16(%edx),%esp
+ jmpl *20(%edx)
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ModU64x32.asm b/MdePkg/Library/BaseLib/ia32/ModU64x32.asm new file mode 100644 index 0000000000..62481ce98a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ModU64x32.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the remainder of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathModU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ mov eax, [esp + 4]
+ div ecx
+ mov eax, edx
+ ret
+InternalMathModU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ModU64x32.s b/MdePkg/Library/BaseLib/ia32/ModU64x32.s new file mode 100644 index 0000000000..ed9c2fee25 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ModU64x32.s @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.asm
+#
+# Abstract:
+#
+# Calculate the remainder of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _ModU64x32
+_ModU64x32:
+ movl 8(%esp),%eax
+ movl 12(%esp),%ecx
+ xorl %edx,%edx
+ divl %ecx
+ movl 4(%esp),%eax
+ divl %ecx
+ movl %edx,%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Monitor.asm b/MdePkg/Library/BaseLib/ia32/Monitor.asm new file mode 100644 index 0000000000..5d92d26673 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Monitor.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+_AsmMonitor PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ DB 0fh, 1, 0c8h
+ ret
+_AsmMonitor ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Monitor.s b/MdePkg/Library/BaseLib/ia32/Monitor.s new file mode 100644 index 0000000000..8da0e341ed --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Monitor.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Monitor.Asm
+#
+# Abstract:
+#
+# AsmMonitor function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMonitor (
+# IN UINTN Eax,
+# IN UINTN Ecx,
+# IN UINTN Edx
+# );
+#------------------------------------------------------------------------------
+.global _AsmMonitor
+_AsmMonitor:
+ movl 4(%esp),%eax
+ movl 8(%esp),%ecx
+ movl 12(%esp),%edx
+ monitor %eax,%ecx,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x32.asm b/MdePkg/Library/BaseLib/ia32/MultU64x32.asm new file mode 100644 index 0000000000..e2806e3082 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x32.asm @@ -0,0 +1,35 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x32.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathMultU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, ecx
+ imul ecx, [esp + 8]
+ mul dword ptr [esp + 4]
+ add edx, ecx
+ ret
+InternalMathMultU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x32.s b/MdePkg/Library/BaseLib/ia32/MultU64x32.s new file mode 100644 index 0000000000..03c520bcf7 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x32.s @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x32.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _MultU64x32
+_MultU64x32:
+ movl 12(%esp),%ecx
+ movl %ecx,%eax
+ imull 8(%esp),%ecx
+ mull 4(%esp)
+ addl %ecx,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x64.asm b/MdePkg/Library/BaseLib/ia32/MultU64x64.asm new file mode 100644 index 0000000000..24c6a7daa3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x64.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x64.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and another 64-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathMultU64x64 PROC USES ebx
+ mov ebx, [esp + 8]
+ mov edx, [esp + 16]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, [esp + 20]
+ imul edx, [esp + 12]
+ add ebx, edx
+ mul ecx
+ add edx, ebx
+ ret
+InternalMathMultU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x64.s b/MdePkg/Library/BaseLib/ia32/MultU64x64.s new file mode 100644 index 0000000000..8841fc44dc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x64.s @@ -0,0 +1,49 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x64.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and another 64-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _MultS64x64
+_MultS64x64:
+ #
+ # MultS64x32 shares the same implementation with _MultU64x32, and thus no
+ # code inside this function.
+ #
+
+
+.global _MultU64x64
+ push %ebx
+ movl 8(%esp),%ebx
+ movl 16(%esp),%edx
+ movl %ebx,%ecx
+ movl %edx,%eax
+ imull 20(%esp),%ebx
+ imull 12(%esp),%edx
+ addl %edx,%ebx
+ mull %ecx
+ addl %ebx,%edx
+ pop %ebx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Mwait.asm b/MdePkg/Library/BaseLib/ia32/Mwait.asm new file mode 100644 index 0000000000..91d505b4e2 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Mwait.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+_AsmMwait PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ DB 0fh, 1, 0c9h
+ ret
+_AsmMwait ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Mwait.s b/MdePkg/Library/BaseLib/ia32/Mwait.s new file mode 100644 index 0000000000..7e04453352 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Mwait.s @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Mwait.Asm
+#
+# Abstract:
+#
+# AsmMwait function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMwait (
+# IN UINTN Eax,
+# IN UINTN Ecx
+# );
+#------------------------------------------------------------------------------
+.global _AsmMwait
+_AsmMwait:
+ movl 4(%esp),%eax
+ movl 8(%esp),%ecx
+ mwait %eax,%ecx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Non-existing.c b/MdePkg/Library/BaseLib/ia32/Non-existing.c new file mode 100644 index 0000000000..4132d30c31 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Non-existing.c @@ -0,0 +1,30 @@ +/** @file
+ Non-existing BaseLib functions on Ia32
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/ia32/RRotU64.asm b/MdePkg/Library/BaseLib/ia32/RRotU64.asm new file mode 100644 index 0000000000..062e201e8d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RRotU64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.asm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathRRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathRRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/RRotU64.s b/MdePkg/Library/BaseLib/ia32/RRotU64.s new file mode 100644 index 0000000000..541e420a3c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RRotU64.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RRotU64.asm
+#
+# Abstract:
+#
+# 64-bit right rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _RRotU64
+ push %ebx
+ movb 16(%esp),%cl
+ movl 8(%esp),%eax
+ movl 12(%esp),%edx
+ shrdl %cl,%eax,%ebx
+ shrdl %cl,%edx,%eax
+ roll %cl,%ebx
+ shrdl %cl,%ebx,%edx
+ testb $32,%cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/RShiftU64.asm b/MdePkg/Library/BaseLib/ia32/RShiftU64.asm new file mode 100644 index 0000000000..effbc55e1c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RShiftU64.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit logical right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathRShiftU64 PROC
+ mov cl, [esp + 12]
+ xor edx, edx
+ mov eax, [esp + 8]
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ shr edx, cl
+ ret
+InternalMathRShiftU64 ENDP
+
+ END
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ia32/RShiftU64.s b/MdePkg/Library/BaseLib/ia32/RShiftU64.s new file mode 100644 index 0000000000..5b681e391b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RShiftU64.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit logical right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _RShiftU64
+_RShiftU64:
+ movb 12(%esp),%cl
+ xorl %edx,%edx
+ movl 8(%esp),%eax
+ testb $32,%cl
+ cmovz %eax, %edx
+ cmovz 4(%esp), %eax
+ shrdl %cl,%edx,%eax
+ shrl %cl,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr0.asm b/MdePkg/Library/BaseLib/ia32/ReadCr0.asm new file mode 100644 index 0000000000..579cee2377 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr0 PROC
+ mov eax, cr0
+ ret
+_AsmReadCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr0.s b/MdePkg/Library/BaseLib/ia32/ReadCr0.s new file mode 100644 index 0000000000..3108b71eeb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr0.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr0.Asm
+#
+# Abstract:
+#
+# AsmReadCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr0
+_AsmReadCr0:
+ movl %cr0, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr2.asm b/MdePkg/Library/BaseLib/ia32/ReadCr2.asm new file mode 100644 index 0000000000..3e4a926abd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr2 PROC
+ mov eax, cr2
+ ret
+_AsmReadCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr2.s b/MdePkg/Library/BaseLib/ia32/ReadCr2.s new file mode 100644 index 0000000000..3ce287a252 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr2.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr2.Asm
+#
+# Abstract:
+#
+# AsmReadCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr2
+_AsmReadCr2:
+ movl %cr2, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr3.asm b/MdePkg/Library/BaseLib/ia32/ReadCr3.asm new file mode 100644 index 0000000000..c24ded8051 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr3 PROC
+ mov eax, cr3
+ ret
+_AsmReadCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr3.s b/MdePkg/Library/BaseLib/ia32/ReadCr3.s new file mode 100644 index 0000000000..2bd63c725a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr3.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr3.Asm
+#
+# Abstract:
+#
+# AsmReadCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr3
+_AsmReadCr3:
+ movl %cr3, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr4.asm b/MdePkg/Library/BaseLib/ia32/ReadCr4.asm new file mode 100644 index 0000000000..258f37a97f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr4.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr4 PROC
+ mov eax, cr4
+ ret
+_AsmReadCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr4.s b/MdePkg/Library/BaseLib/ia32/ReadCr4.s new file mode 100644 index 0000000000..4d746d807b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr4.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr4.Asm
+#
+# Abstract:
+#
+# AsmReadCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr4
+_AsmReadCr4:
+ movl %cr4, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCs.asm b/MdePkg/Library/BaseLib/ia32/ReadCs.asm new file mode 100644 index 0000000000..5972d66754 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCs PROC
+ mov ax, cs
+ ret
+_AsmReadCs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCs.s b/MdePkg/Library/BaseLib/ia32/ReadCs.s new file mode 100644 index 0000000000..66bf4b9eeb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCs.Asm
+#
+# Abstract:
+#
+# AsmReadCs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadCs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCs
+_AsmReadCs:
+ movw %cs,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr0.asm b/MdePkg/Library/BaseLib/ia32/ReadDr0.asm new file mode 100644 index 0000000000..4da1dd8d0d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr0 PROC
+ mov eax, dr0
+ ret
+_AsmReadDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr0.s b/MdePkg/Library/BaseLib/ia32/ReadDr0.s new file mode 100644 index 0000000000..00c521b51d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr0.s @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr0.Asm
+#
+# Abstract:
+#
+# AsmReadDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr0
+_AsmReadDr0:
+ movl %dr0, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr1.asm b/MdePkg/Library/BaseLib/ia32/ReadDr1.asm new file mode 100644 index 0000000000..8724dd228b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr1.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr1 PROC
+ mov eax, dr1
+ ret
+_AsmReadDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr1.s b/MdePkg/Library/BaseLib/ia32/ReadDr1.s new file mode 100644 index 0000000000..81d0e54919 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr1.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr1.Asm
+#
+# Abstract:
+#
+# AsmReadDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr1
+_AsmReadDr1:
+ movl %dr1, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr2.asm b/MdePkg/Library/BaseLib/ia32/ReadDr2.asm new file mode 100644 index 0000000000..9122d42545 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr2 PROC
+ mov eax, dr2
+ ret
+_AsmReadDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr2.s b/MdePkg/Library/BaseLib/ia32/ReadDr2.s new file mode 100644 index 0000000000..296fff699e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr2.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr2.Asm
+#
+# Abstract:
+#
+# AsmReadDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr2
+_AsmReadDr2:
+ movl %dr2, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr3.asm b/MdePkg/Library/BaseLib/ia32/ReadDr3.asm new file mode 100644 index 0000000000..7c1ee9826d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr3 PROC
+ mov eax, dr3
+ ret
+_AsmReadDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr3.s b/MdePkg/Library/BaseLib/ia32/ReadDr3.s new file mode 100644 index 0000000000..e99391de81 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr3.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr3.Asm
+#
+# Abstract:
+#
+# AsmReadDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr3
+_AsmReadDr3:
+ movl %dr3, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr4.asm b/MdePkg/Library/BaseLib/ia32/ReadDr4.asm new file mode 100644 index 0000000000..01724555d2 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr4.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr4 PROC
+ DB 0fh, 21h, 0e0h
+ ret
+_AsmReadDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr5.asm b/MdePkg/Library/BaseLib/ia32/ReadDr5.asm new file mode 100644 index 0000000000..a95527e44c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr5.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr5 PROC
+ DB 0fh, 21h, 0e8h
+ ret
+_AsmReadDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr6.asm b/MdePkg/Library/BaseLib/ia32/ReadDr6.asm new file mode 100644 index 0000000000..b2d9a3d252 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr6.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr6 PROC
+ mov eax, dr6
+ ret
+_AsmReadDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr6.s b/MdePkg/Library/BaseLib/ia32/ReadDr6.s new file mode 100644 index 0000000000..bdadd80672 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr6.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr6.Asm
+#
+# Abstract:
+#
+# AsmReadDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr6
+_AsmReadDr6:
+ movl %dr6, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr7.asm b/MdePkg/Library/BaseLib/ia32/ReadDr7.asm new file mode 100644 index 0000000000..23924b1184 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr7.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr7 PROC
+ mov eax, dr7
+ ret
+_AsmReadDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr7.s b/MdePkg/Library/BaseLib/ia32/ReadDr7.s new file mode 100644 index 0000000000..cf213caac9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr7.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr7.Asm
+#
+# Abstract:
+#
+# AsmReadDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr7
+_AsmReadDr7:
+ movl %dr7, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDs.asm b/MdePkg/Library/BaseLib/ia32/ReadDs.asm new file mode 100644 index 0000000000..6992766e58 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDs PROC
+ mov ax, ds
+ ret
+_AsmReadDs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDs.s b/MdePkg/Library/BaseLib/ia32/ReadDs.s new file mode 100644 index 0000000000..ca1e37937a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDs.Asm
+#
+# Abstract:
+#
+# AsmReadDs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadDs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDs
+_AsmReadDs:
+ movw %ds,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEflags.asm b/MdePkg/Library/BaseLib/ia32/ReadEflags.asm new file mode 100644 index 0000000000..365b1dee87 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEflags.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadEflags PROC
+ pushfd
+ pop eax
+ ret
+_AsmReadEflags ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEflags.s b/MdePkg/Library/BaseLib/ia32/ReadEflags.s new file mode 100644 index 0000000000..a70a209ffb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEflags.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEflags.Asm
+#
+# Abstract:
+#
+# AsmReadEflags function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadEflags (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadEflags
+_AsmReadEflags:
+ pushfl
+ popl %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEs.asm b/MdePkg/Library/BaseLib/ia32/ReadEs.asm new file mode 100644 index 0000000000..0ced46aa62 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadEs PROC
+ mov ax, es
+ ret
+_AsmReadEs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEs.s b/MdePkg/Library/BaseLib/ia32/ReadEs.s new file mode 100644 index 0000000000..69727b5afc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEs.Asm
+#
+# Abstract:
+#
+# AsmReadEs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadEs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadEs
+_AsmReadEs:
+ movw %es,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadFs.asm b/MdePkg/Library/BaseLib/ia32/ReadFs.asm new file mode 100644 index 0000000000..f1790c6e9e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadFs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadFs PROC
+ mov ax, fs
+ ret
+_AsmReadFs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadFs.s b/MdePkg/Library/BaseLib/ia32/ReadFs.s new file mode 100644 index 0000000000..7f4fdfa77c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadFs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadFs.Asm
+#
+# Abstract:
+#
+# AsmReadFs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadFs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadFs
+_AsmReadFs:
+ movw %fs,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGdtr.asm b/MdePkg/Library/BaseLib/ia32/ReadGdtr.asm new file mode 100644 index 0000000000..beacb62b0d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadGdtr PROC
+ mov eax, [esp + 4]
+ sgdt fword ptr [eax]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGdtr.s b/MdePkg/Library/BaseLib/ia32/ReadGdtr.s new file mode 100644 index 0000000000..f03a05696d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGdtr.Asm
+#
+# Abstract:
+#
+# AsmReadGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmReadGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadGdtr
+_AsmReadGdtr:
+ movl 4(%esp),%eax
+ sgdt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGs.asm b/MdePkg/Library/BaseLib/ia32/ReadGs.asm new file mode 100644 index 0000000000..1de0ebfc88 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadGs PROC
+ mov ax, gs
+ ret
+_AsmReadGs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGs.s b/MdePkg/Library/BaseLib/ia32/ReadGs.s new file mode 100644 index 0000000000..0d88a60a52 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGs.Asm
+#
+# Abstract:
+#
+# AsmReadGs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadGs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadGs
+_AsmReadGs:
+ movw %gs,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadIdtr.asm b/MdePkg/Library/BaseLib/ia32/ReadIdtr.asm new file mode 100644 index 0000000000..95158be903 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadIdtr.asm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalX86ReadIdtr PROC
+ mov eax, [esp + 4]
+ sidt fword ptr [eax]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadIdtr.s b/MdePkg/Library/BaseLib/ia32/ReadIdtr.s new file mode 100644 index 0000000000..fa72d3ba7d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadIdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadIdtr.Asm
+#
+# Abstract:
+#
+# AsmReadIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmReadIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadIdtr
+_AsmReadIdtr:
+ movl 4(%esp),%eax
+ sidt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadLdtr.asm b/MdePkg/Library/BaseLib/ia32/ReadLdtr.asm new file mode 100644 index 0000000000..a859a0e553 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadLdtr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadLdtr PROC
+ sldt ax
+ ret
+_AsmReadLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadLdtr.s b/MdePkg/Library/BaseLib/ia32/ReadLdtr.s new file mode 100644 index 0000000000..aea1d9265c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadLdtr.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadLdtr.Asm
+#
+# Abstract:
+#
+# AsmReadLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadLdtr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadLdtr
+_AsmReadLdtr:
+ sldt %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm0.asm b/MdePkg/Library/BaseLib/ia32/ReadMm0.asm new file mode 100644 index 0000000000..c45895b2a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm0.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm0 PROC
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ ret
+_AsmReadMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm0.s b/MdePkg/Library/BaseLib/ia32/ReadMm0.s new file mode 100644 index 0000000000..dd6b846836 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm0.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm0.Asm
+#
+# Abstract:
+#
+# AsmReadMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm0
+_AsmReadMm0:
+ pushl %eax
+ pushl %eax
+ movq %mm0,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm1.asm b/MdePkg/Library/BaseLib/ia32/ReadMm1.asm new file mode 100644 index 0000000000..ea748cbd7e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm1.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm1 PROC
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ ret
+_AsmReadMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm1.s b/MdePkg/Library/BaseLib/ia32/ReadMm1.s new file mode 100644 index 0000000000..cbaafff0f3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm1.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm1.Asm
+#
+# Abstract:
+#
+# AsmReadMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm1
+_AsmReadMm1:
+ pushl %eax
+ pushl %eax
+ movq %mm1,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm2.asm b/MdePkg/Library/BaseLib/ia32/ReadMm2.asm new file mode 100644 index 0000000000..ab16c513f3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm2.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm2 PROC
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ ret
+_AsmReadMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm2.s b/MdePkg/Library/BaseLib/ia32/ReadMm2.s new file mode 100644 index 0000000000..22a5d71ebc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm2.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm2.Asm
+#
+# Abstract:
+#
+# AsmReadMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm2
+_AsmReadMm2:
+ pushl %eax
+ pushl %eax
+ movq %mm2,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm3.asm b/MdePkg/Library/BaseLib/ia32/ReadMm3.asm new file mode 100644 index 0000000000..3c4bf34492 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm3.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm3 PROC
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ ret
+_AsmReadMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm3.s b/MdePkg/Library/BaseLib/ia32/ReadMm3.s new file mode 100644 index 0000000000..dae267af7a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm3.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm3.Asm
+#
+# Abstract:
+#
+# AsmReadMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm3
+_AsmReadMm3:
+ pushl %eax
+ pushl %eax
+ movq %mm3,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm4.asm b/MdePkg/Library/BaseLib/ia32/ReadMm4.asm new file mode 100644 index 0000000000..4c2beb885b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm4.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm4 PROC
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ ret
+_AsmReadMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm4.s b/MdePkg/Library/BaseLib/ia32/ReadMm4.s new file mode 100644 index 0000000000..0ae1afcedd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm4.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm4.Asm
+#
+# Abstract:
+#
+# AsmReadMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm4
+_AsmReadMm4:
+ pushl %eax
+ pushl %eax
+ movq %mm4,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm5.asm b/MdePkg/Library/BaseLib/ia32/ReadMm5.asm new file mode 100644 index 0000000000..66e38265c6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm5.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm5 PROC
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ ret
+_AsmReadMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm5.s b/MdePkg/Library/BaseLib/ia32/ReadMm5.s new file mode 100644 index 0000000000..2fad14a7e0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm5.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm5.Asm
+#
+# Abstract:
+#
+# AsmReadMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm5 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm5
+_AsmReadMm5:
+ pushl %eax
+ pushl %eax
+ movq %mm5,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm6.asm b/MdePkg/Library/BaseLib/ia32/ReadMm6.asm new file mode 100644 index 0000000000..69d9e13f6b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm6.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm6 PROC
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ ret
+_AsmReadMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm6.s b/MdePkg/Library/BaseLib/ia32/ReadMm6.s new file mode 100644 index 0000000000..22cddfa486 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm6.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm6.Asm
+#
+# Abstract:
+#
+# AsmReadMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm6
+_AsmReadMm6:
+ pushl %eax
+ pushl %eax
+ movq %mm6,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm7.asm b/MdePkg/Library/BaseLib/ia32/ReadMm7.asm new file mode 100644 index 0000000000..a8788cbf7a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm7.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm7 PROC
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ ret
+_AsmReadMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm7.s b/MdePkg/Library/BaseLib/ia32/ReadMm7.s new file mode 100644 index 0000000000..fb485a00c9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm7.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm7.Asm
+#
+# Abstract:
+#
+# AsmReadMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm7
+_AsmReadMm7:
+ pushl %eax
+ pushl %eax
+ movq %mm7,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMsr64.asm b/MdePkg/Library/BaseLib/ia32/ReadMsr64.asm new file mode 100644 index 0000000000..6c9fe00033 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMsr64.asm @@ -0,0 +1,55 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmReadMsr32 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+_AsmReadMsr32 PROC
+ ;
+ ; AsmReadMsr32 shares the same implementation with AsmReadMsr64 and thus no
+ ; code inside this function
+ ;
+_AsmReadMsr32 ENDP
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT64 Index
+; );
+;------------------------------------------------------------------------------
+_AsmReadMsr64 PROC
+ mov ecx, [esp + 4]
+ rdmsr
+ ret
+_AsmReadMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMsr64.s b/MdePkg/Library/BaseLib/ia32/ReadMsr64.s new file mode 100644 index 0000000000..6a2c9c6688 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMsr64.s @@ -0,0 +1,57 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMsr64.Asm
+#
+# Abstract:
+#
+# AsmReadMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# AsmReadMsr32 (
+# IN UINT32 Index
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMsr32
+_AsmReadMsr32:
+ #
+ # AsmReadMsr32 shares the same implementation with AsmReadMsr64 and thus no
+ # code inside this function
+ #
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadMsr64 (
+# IN UINT64 Index
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMsr64
+_AsmReadMsr64:
+ movl 4(%esp),%ecx
+ rdmsr
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadPmc.asm b/MdePkg/Library/BaseLib/ia32/ReadPmc.asm new file mode 100644 index 0000000000..1fe598158d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadPmc.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+_AsmReadPmc PROC
+ mov ecx, [esp + 4]
+ rdpmc
+ ret
+_AsmReadPmc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadPmc.s b/MdePkg/Library/BaseLib/ia32/ReadPmc.s new file mode 100644 index 0000000000..868e85c23d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadPmc.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadPmc.Asm
+#
+# Abstract:
+#
+# AsmReadPmc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadPmc (
+# IN UINT32 PmcIndex
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadPmc
+_AsmReadPmc:
+ movl 4(%esp),%ecx
+ rdpmc
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadSs.asm b/MdePkg/Library/BaseLib/ia32/ReadSs.asm new file mode 100644 index 0000000000..6d0cd9f2a0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadSs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadSs PROC
+ mov ax, ss
+ ret
+_AsmReadSs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadSs.s b/MdePkg/Library/BaseLib/ia32/ReadSs.s new file mode 100644 index 0000000000..7db65c1490 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadSs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadSs.Asm
+#
+# Abstract:
+#
+# AsmReadSs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadSs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadSs
+_AsmReadSs:
+ movw %ss,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTr.asm b/MdePkg/Library/BaseLib/ia32/ReadTr.asm new file mode 100644 index 0000000000..d77ee89123 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadTr PROC
+ str ax
+ ret
+_AsmReadTr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTr.s b/MdePkg/Library/BaseLib/ia32/ReadTr.s new file mode 100644 index 0000000000..8c31e9d9fa --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTr.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTr.Asm
+#
+# Abstract:
+#
+# AsmReadTr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadTr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadTr
+_AsmReadTr:
+ str %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTsc.asm b/MdePkg/Library/BaseLib/ia32/ReadTsc.asm new file mode 100644 index 0000000000..ea3c164ecd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadTsc PROC
+ rdtsc
+ ret
+_AsmReadTsc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTsc.s b/MdePkg/Library/BaseLib/ia32/ReadTsc.s new file mode 100644 index 0000000000..e7981c05b0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTsc.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTsc.Asm
+#
+# Abstract:
+#
+# AsmReadTsc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadTsc (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadTsc
+_AsmReadTsc:
+ rdtsc
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/SetJump.asm b/MdePkg/Library/BaseLib/ia32/SetJump.asm new file mode 100644 index 0000000000..41277cd20f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SetJump.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+_SetJump PROC
+ pop ecx
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx
+ xor eax, eax
+ jmp ecx
+_SetJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/SetJump.s b/MdePkg/Library/BaseLib/ia32/SetJump.s new file mode 100644 index 0000000000..b1b6a84f63 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SetJump.s @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetJump.Asm
+#
+# Abstract:
+#
+# Implementation of SetJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _SetJump
+_SetJump:
+ popl %ecx
+ movl (%esp),%edx
+ movl %ebx,(%edx)
+ movl %esi,4(%edx)
+ movl %edi,8(%edx)
+ movl %ebp,12(%edx)
+ movl %esp,16(%edx)
+ movl %ecx,20(%edx)
+ xorl %eax,%eax
+ jmp *%ecx
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/SwapBytes64.asm b/MdePkg/Library/BaseLib/ia32/SwapBytes64.asm new file mode 100644 index 0000000000..72e366bd4d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SwapBytes64.asm @@ -0,0 +1,36 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+InternalMathSwapBytes64 PROC
+ mov eax, [esp + 8]
+ mov edx, [esp + 4]
+ bswap eax
+ bswap edx
+ ret
+InternalMathSwapBytes64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/SwitchStack.c b/MdePkg/Library/BaseLib/ia32/SwitchStack.c new file mode 100644 index 0000000000..77800e35dd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SwitchStack.c @@ -0,0 +1,57 @@ +/** @file
+ SwitchStack() function for IA-32.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1,
+ IN VOID *Context2,
+ IN VOID *NewStack
+ )
+{
+ BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
+
+ ASSERT (EntryPoint != NULL && NewStack != NULL);
+
+ JumpBuffer.Eip = (UINTN)EntryPoint;
+ JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);
+ JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2);
+ ((VOID**)JumpBuffer.Esp)[1] = Context1;
+ ((VOID**)JumpBuffer.Esp)[2] = Context2;
+
+ LongJump (&JumpBuffer, (UINTN)-1);
+}
diff --git a/MdePkg/Library/BaseLib/ia32/Thunk16.asm b/MdePkg/Library/BaseLib/ia32/Thunk16.asm new file mode 100644 index 0000000000..2d62d72aef --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Thunk16.asm @@ -0,0 +1,163 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+
+ .data
+
+NullSegSel DQ 0
+_16BitCsSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment
+ DB 0
+_16BitDsSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment
+ DB 0
+GdtEnd LABEL QWORD
+
+ .const
+
+_16Gdtr LABEL FWORD
+ DW offset GdtEnd - offset NullSegSel - 1
+ DD offset NullSegSel
+
+_16Idtr FWORD (1 SHL 10) - 1
+
+ .code
+
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_EFLAGS DD ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
+ mov esi, [esp + 36] ; esi <- RegSet
+ push sizeof (IA32_REGS)
+ pop ecx
+ movzx edx, (IA32_REGS ptr [esi])._SS
+ mov edi, (IA32_REGS ptr [esi])._ESP
+ sub edi, ecx ; reserve space on realmode stack
+ push edi ; save stack offset
+ imul eax, edx, 16 ; eax <- edx * 16
+ add edi, eax ; edi <- linear address of 16-bit stack
+ rep movsb ; copy RegSet
+ mov esi, edx ; esi <- 16-bit stack segment
+ pop ebx ; ebx <- 16-bit stack offset
+ mov edi, [esp + 40] ; edi <- realmode patch
+ push cs ; save CS segment selector
+ push offset @BackToThunk ; offset to back from real mode
+ mov eax, offset @16Return
+ stosd
+ xor eax, eax
+ stosw ; set CS base to 0
+ mov eax, esp
+ stosd
+ mov eax, ss
+ stosd
+ mov eax, cr0
+ mov ecx, eax ; ecx <- CR0
+ and ecx, 7ffffffeh ; clear PE, PG bits
+ stosd
+ mov eax, cr4
+ mov ebp, eax
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ stosd
+ sidt fword ptr [esp + 44] ; use parameter space to save IDTR
+ sgdt fword ptr [edi]
+ lidt _16Idtr
+ push 10h
+ pop eax
+ push 8
+ push offset @16Start
+ lgdt _16Gdtr
+ retf
+@16Start: ; 16-bit starts here
+ mov ss, eax ; set SS to be a 16-bit segment
+ mov cr0, ecx
+ mov cr4, ebp
+ mov ss, esi ; set up 16-bit stack
+ mov sp, bx ; mov esp, ebx actually
+ popaw ; popad actually
+ pop ds
+ pop es
+ pop fs
+ pop gs
+ add sp, 4 ; skip _EFLAGS
+ DB 66h
+ retf ; transfer control to 16-bit code
+@16Return:
+ pushf ; pushfd actually
+ push gs
+ push fs
+ push es
+ push ds
+ pushaw ; pushad actually
+ DB 67h, 66h
+ lds esi, fword ptr (IA32_REGS ptr [esp])._EIP
+ DB 67h, 66h
+ mov eax, [esi + 12]
+ mov cr4, eax ; restore CR4
+ DB 67h, 66h
+ lgdt fword ptr [esi + 16]
+ DB 67h, 66h
+ mov eax, [esi + 8]
+ mov cr0, eax ; restore CR0
+ xor ax, ax ; xor eax, eax actually
+ mov eax, ss
+ DB 67h
+ mov dword ptr (IA32_REGS ptr [esp])._SS, eax
+ shl ax, 4 ; shl eax, 4 actually
+ add ax, sp ; add eax, esp actually
+ add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)
+ DB 67h, 66h
+ mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp
+ DB 67h, 66h
+ lss esp, fword ptr [esi] ; restore protected mode stack
+ DB 66h
+ retf ; go back to protected mode
+@BackToThunk:
+ lidt fword ptr [esp + 36] ; restore protected mode IDTR
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Thunk16.s b/MdePkg/Library/BaseLib/ia32/Thunk16.s new file mode 100644 index 0000000000..4236996226 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Thunk16.s @@ -0,0 +1,191 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Thunk.asm
+#
+# Abstract:
+#
+# Real mode thunk
+#
+#------------------------------------------------------------------------------
+
+
+
+MISMATCH: "EXTERNDEF C mCode16Size:DWORD"
+
+MISMATCH: "CONST SEGMENT FLAT "DATA" READONLY"
+
+MISMATCH: "mCode16Size DD _TEXT16SIZE"
+
+MISMATCH: "CONSTS"
+
+MISMATCH: "_DATA SEGMENT FLAT "DATA""
+
+MISMATCH: "NullSegSel DQ 0"
+MISMATCH: "_16BitCsSel LABEL QWORD"
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x9b
+ .byte 0x8f # 16-bit segment
+ .byte 0
+
+MISMATCH: "_16Gdtr LABEL FWORD"
+MISMATCH: " DW $ - offset NullSegSel - 1"
+MISMATCH: " DD offset NullSegSel"
+
+MISMATCH: "_DATAS"
+
+MISMATCH: "_TEXT SEGMENT FLAT "CODE" PARA"
+
+MISMATCH: "IA32_REGS STRUC 4t"
+MISMATCH: "_EDI DD ?"
+MISMATCH: "_ESI DD ?"
+MISMATCH: "_EBP DD ?"
+MISMATCH: "_ESP DD ?"
+MISMATCH: "_EBX DD ?"
+MISMATCH: "_EDX DD ?"
+MISMATCH: "_ECX DD ?"
+MISMATCH: "_EAX DD ?"
+MISMATCH: "_DS DW ?"
+MISMATCH: "_ES DW ?"
+MISMATCH: "_FS DW ?"
+MISMATCH: "_GS DW ?"
+MISMATCH: "_EFLAGS DD ?"
+MISMATCH: "_EIP DD ?"
+MISMATCH: "_CS DW ?"
+MISMATCH: "_SS DW ?"
+MISMATCH: "IA32_REGSS"
+
+MISMATCH: "_STK16 STRUC 1t"
+MISMATCH: "RetEip DD ?"
+MISMATCH: "RetCs DW ?"
+MISMATCH: "ThunkFlags DW ?"
+MISMATCH: "SavedEsp DD ?"
+MISMATCH: "SavedSs DW ?"
+MISMATCH: "SavedGdtr FWORD ?"
+MISMATCH: "SavedCr0 DD ?"
+MISMATCH: "SavedCr4 DD ?"
+MISMATCH: "_STK16S"
+
+.global _InternalAsmThunk16
+MISMATCH: "_InternalAsmThunk16: USES ebp ebx esi edi ds es fs gs"
+MISMATCH: " ASSUME esi:PTR IA32_REGS"
+ movl 36(%esp),%esi
+MISMATCH: " movzx edx, [esi]._SS"
+ movl $[esi]._ESP, %edi
+MISMATCH: " add edi, - sizeof (_STK16) - sizeof (IA32_REGS)"
+ pushl %edi # save stack offset
+ imull $16,%edx,%eax # eax <- edx*16
+ addl %eax,%edi # edi <- linear address of 16-bit stack
+MISMATCH: " push sizeof (IA32_REGS) / 4"
+ popl %ecx
+ rep
+ movsl # copy context to 16-bit stack
+ popl %ebx # ebx <- 16-bit stack offset
+MISMATCH: " mov eax, offset @F "
+ stosl
+ movl %cs,%eax # return segment
+ stosw
+ movl 40(%esp),%eax # THUNK flags
+ stosw
+ movl %esp,%eax
+ stosl # save esp
+ movl %ss,%eax # save ss
+ stosw
+MISMATCH: " sgdt fword ptr [edi] "
+MISMATCH: " sidt fword ptr [esp + 36] "
+ movl %cr0, %esi
+ movl %esi,6(%edi) # save CR0
+MISMATCH: " and esi, NOT 80000001h "
+ movl %cr4, %eax
+ movl %eax,10(%edi) # save CR4
+MISMATCH: " and al, NOT 30h "
+ movl %edx,%edi # edi <- 16-bit stack segment
+ movl 44(%esp),%edx
+ shll $16,%edx
+ pushl %edx
+MISMATCH: " lgdt _16Gdtr "
+ .byte 0xea
+MISMATCH: " DD offset @16Bit"
+ .word 8 # jmp far 8:@16Bit
+@16Bit:
+ movl %esi, %cr0 # disable protected mode
+ movl %eax, %cr4 # disable PAE & PSE
+ lret
+@@:
+ movl %ss,%eax
+ shll $4,%eax
+ addl %esp,%eax # eax <- address of 16-bit stack
+MISMATCH: " lss esp, fword ptr (_STK16 ptr [esp + sizeof (IA32_REGS)]).SavedEsp"
+MISMATCH: " lidt fword ptr [esp + 36] "
+ ret
+
+
+MISMATCH: "_TEXTS"
+
+MISMATCH: "_TEXT16 SEGMENT USE16 "CODE" PARA"
+
+.global _Code16Addr
+MISMATCH: "_Code16Addr: C"
+
+
+.global RealMode
+RealMode:
+MISMATCH: " ASSUME bp:PTR _STK16"
+ movw %di,%ss # set up stack
+ movl %ebx,%esp
+MISMATCH: " lidt fword ptr cs:[_16Idtr - _Code16Addr]"
+ popal
+ popl %ds
+ popl %es
+ popl %fs
+ popl %gs
+ addw $4,%sp # skip EFlags
+MISMATCH: " test (_STK16 ptr [esp + 8]).ThunkFlags, 1"
+ jz @F
+ pushf
+@@:
+ pushw %cs
+MISMATCH: " push @FarCallRet - _Code16Addr"
+ jz @F
+MISMATCH: " jmp fword ptr [esp + 6]"
+@@:
+MISMATCH: " jmp fword ptr [esp + 4]"
+@FarCallRet:
+ pushfl
+ pushw %gs
+ pushw %fs
+ pushw %es
+ pushw %ds
+ pushal
+ cli
+MISMATCH: " lea bp, [esp + sizeof (IA32_REGS)]"
+ .byte 0x66
+MISMATCH: " lgdt [bp].SavedGdtr"
+ movl $[bp].SavedCr4, %eax
+ movl %eax, %cr4
+ movl $[bp].SavedCr0, %eax
+ movl %eax, %cr0 # restore CR0
+MISMATCH: " jmp fword ptr [bp].RetEip"
+
+
+MISMATCH: "_16Idtr FWORD (1 SHL 10) - 1"
+
+_TEXT16:
+
+MISMATCH: "_TEXT16SIZE = _TEXT16- _Code16Addr"
+
+MISMATCH: "_TEXT16S"
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Wbinvd.asm b/MdePkg/Library/BaseLib/ia32/Wbinvd.asm new file mode 100644 index 0000000000..07258fb9e9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Wbinvd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWbinvd PROC
+ wbinvd
+ ret
+_AsmWbinvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Wbinvd.s b/MdePkg/Library/BaseLib/ia32/Wbinvd.s new file mode 100644 index 0000000000..e9f6c0ce6b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Wbinvd.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Wbinvd.Asm
+#
+# Abstract:
+#
+# AsmWbinvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWbinvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWbinvd
+_AsmWbinvd:
+ wbinvd
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr0.asm b/MdePkg/Library/BaseLib/ia32/WriteCr0.asm new file mode 100644 index 0000000000..d64d621cd5 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr0 PROC
+ mov eax, [esp + 4]
+ mov cr0, eax
+ ret
+_AsmWriteCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr0.s b/MdePkg/Library/BaseLib/ia32/WriteCr0.s new file mode 100644 index 0000000000..6e3ad50765 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr0.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr0.Asm
+#
+# Abstract:
+#
+# AsmWriteCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr0
+_AsmWriteCr0:
+ movl 4(%esp),%eax
+ movl %eax, %cr0
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr2.asm b/MdePkg/Library/BaseLib/ia32/WriteCr2.asm new file mode 100644 index 0000000000..7ab5b0f64f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr2 PROC
+ mov eax, [esp + 4]
+ mov cr2, eax
+ ret
+_AsmWriteCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr2.s b/MdePkg/Library/BaseLib/ia32/WriteCr2.s new file mode 100644 index 0000000000..cf45e01a24 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr2.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr2.Asm
+#
+# Abstract:
+#
+# AsmWriteCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr2
+_AsmWriteCr2:
+ movl 4(%esp),%eax
+ movl %eax, %cr2
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr3.asm b/MdePkg/Library/BaseLib/ia32/WriteCr3.asm new file mode 100644 index 0000000000..9753de1abe --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr3 PROC
+ mov eax, [esp + 4]
+ mov cr3, eax
+ ret
+_AsmWriteCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr3.s b/MdePkg/Library/BaseLib/ia32/WriteCr3.s new file mode 100644 index 0000000000..1c55581905 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr3.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr3.Asm
+#
+# Abstract:
+#
+# AsmWriteCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr3
+_AsmWriteCr3:
+ movl 4(%esp),%eax
+ movl %eax, %cr3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr4.asm b/MdePkg/Library/BaseLib/ia32/WriteCr4.asm new file mode 100644 index 0000000000..60bfe78cb6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr4 PROC
+ mov eax, [esp + 4]
+ mov cr4, eax
+ ret
+_AsmWriteCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr4.s b/MdePkg/Library/BaseLib/ia32/WriteCr4.s new file mode 100644 index 0000000000..fbe48c1cd0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr4.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr4.Asm
+#
+# Abstract:
+#
+# AsmWriteCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr4
+_AsmWriteCr4:
+ movl 4(%esp),%eax
+ movl %eax, %cr4
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr0.asm b/MdePkg/Library/BaseLib/ia32/WriteDr0.asm new file mode 100644 index 0000000000..3dab544c49 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr0 PROC
+ mov eax, [esp + 4]
+ mov dr0, eax
+ ret
+_AsmWriteDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr0.s b/MdePkg/Library/BaseLib/ia32/WriteDr0.s new file mode 100644 index 0000000000..a5a84de6b4 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr0.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr0.Asm
+#
+# Abstract:
+#
+# AsmWriteDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr0 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr0
+_AsmWriteDr0:
+ movl 4(%esp),%eax
+ movl %eax, %dr0
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr1.asm b/MdePkg/Library/BaseLib/ia32/WriteDr1.asm new file mode 100644 index 0000000000..5898206c53 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr1 PROC
+ mov eax, [esp + 4]
+ mov dr1, eax
+ ret
+_AsmWriteDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr1.s b/MdePkg/Library/BaseLib/ia32/WriteDr1.s new file mode 100644 index 0000000000..66fc2c7cf3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr1.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr1.Asm
+#
+# Abstract:
+#
+# AsmWriteDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr1 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr1
+_AsmWriteDr1:
+ movl 4(%esp),%eax
+ movl %eax, %dr1
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr2.asm b/MdePkg/Library/BaseLib/ia32/WriteDr2.asm new file mode 100644 index 0000000000..3ed25fc8ef --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr2 PROC
+ mov eax, [esp + 4]
+ mov dr2, eax
+ ret
+_AsmWriteDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr2.s b/MdePkg/Library/BaseLib/ia32/WriteDr2.s new file mode 100644 index 0000000000..7b3f780510 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr2.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr2.Asm
+#
+# Abstract:
+#
+# AsmWriteDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr2 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr2
+_AsmWriteDr2:
+ movl 4(%esp),%eax
+ movl %eax, %dr2
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr3.asm b/MdePkg/Library/BaseLib/ia32/WriteDr3.asm new file mode 100644 index 0000000000..c1dbc826b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr3 PROC
+ mov eax, [esp + 4]
+ mov dr3, eax
+ ret
+_AsmWriteDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr3.s b/MdePkg/Library/BaseLib/ia32/WriteDr3.s new file mode 100644 index 0000000000..34d3e4f0cb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr3.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr3.Asm
+#
+# Abstract:
+#
+# AsmWriteDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr3 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr3
+_AsmWriteDr3:
+ movl 4(%esp),%eax
+ movl %eax, %dr3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr4.asm b/MdePkg/Library/BaseLib/ia32/WriteDr4.asm new file mode 100644 index 0000000000..2c82512acc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr4 PROC
+ mov eax, [esp + 4]
+ DB 0fh, 23h, 0e0h
+ ret
+_AsmWriteDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr5.asm b/MdePkg/Library/BaseLib/ia32/WriteDr5.asm new file mode 100644 index 0000000000..dc074244a1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr5 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr5 PROC
+ mov eax, [esp + 4]
+ DB 0fh, 23h, 0e8h
+ ret
+_AsmWriteDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr6.asm b/MdePkg/Library/BaseLib/ia32/WriteDr6.asm new file mode 100644 index 0000000000..e307e827dd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr6 PROC
+ mov eax, [esp + 4]
+ mov dr6, eax
+ ret
+_AsmWriteDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr6.s b/MdePkg/Library/BaseLib/ia32/WriteDr6.s new file mode 100644 index 0000000000..7d7726be64 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr6.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr6.Asm
+#
+# Abstract:
+#
+# AsmWriteDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr6 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr6
+_AsmWriteDr6:
+ movl 4(%esp),%eax
+ movl %eax, %dr6
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr7.asm b/MdePkg/Library/BaseLib/ia32/WriteDr7.asm new file mode 100644 index 0000000000..55dbdc9c52 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr7 PROC
+ mov eax, [esp + 4]
+ mov dr7, eax
+ ret
+_AsmWriteDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr7.s b/MdePkg/Library/BaseLib/ia32/WriteDr7.s new file mode 100644 index 0000000000..a96f445632 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr7.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr7.Asm
+#
+# Abstract:
+#
+# AsmWriteDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr7 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr7
+_AsmWriteDr7:
+ movl 4(%esp),%eax
+ movl %eax, %dr7
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteGdtr.asm b/MdePkg/Library/BaseLib/ia32/WriteGdtr.asm new file mode 100644 index 0000000000..a317e75388 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteGdtr.asm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686P
+ .model flat,C
+ .code
+
+InternalX86WriteGdtr PROC
+ mov eax, [esp + 4]
+ lgdt fword ptr [eax]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteGdtr.s b/MdePkg/Library/BaseLib/ia32/WriteGdtr.s new file mode 100644 index 0000000000..c3eb63d9e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteGdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteGdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteGdtr
+_AsmWriteGdtr:
+ movl 4(%esp),%eax
+ lgdt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteIdtr.asm b/MdePkg/Library/BaseLib/ia32/WriteIdtr.asm new file mode 100644 index 0000000000..d4b3b51a04 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteIdtr.asm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686P
+ .model flat,C
+ .code
+
+InternalX86WriteIdtr PROC
+ mov eax, [esp + 4]
+ lidt fword ptr [eax]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteIdtr.s b/MdePkg/Library/BaseLib/ia32/WriteIdtr.s new file mode 100644 index 0000000000..f71b696d97 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteIdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteIdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteIdtr
+_AsmWriteIdtr:
+ movl 4(%esp),%eax
+ lidt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteLdtr.asm b/MdePkg/Library/BaseLib/ia32/WriteLdtr.asm new file mode 100644 index 0000000000..39f8b2ed5e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteLdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+_AsmWriteLdtr PROC
+ mov eax, [esp + 4]
+ lldt ax
+ ret
+_AsmWriteLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteLdtr.s b/MdePkg/Library/BaseLib/ia32/WriteLdtr.s new file mode 100644 index 0000000000..3797bd547d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteLdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteLdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteLdtr (
+# IN UINT16 Ldtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteLdtr
+_AsmWriteLdtr:
+ movl 4(%esp),%eax
+ lldtw %ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm0.asm b/MdePkg/Library/BaseLib/ia32/WriteMm0.asm new file mode 100644 index 0000000000..e924dbdb61 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm0 PROC
+ movq mm0, [esp + 4]
+ ret
+_AsmWriteMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm0.s b/MdePkg/Library/BaseLib/ia32/WriteMm0.s new file mode 100644 index 0000000000..c4444219a9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm0.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm0.Asm
+#
+# Abstract:
+#
+# AsmWriteMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm0 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm0
+_AsmWriteMm0:
+ movq 4(%esp),%mm0
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm1.asm b/MdePkg/Library/BaseLib/ia32/WriteMm1.asm new file mode 100644 index 0000000000..1f1d8ce8dc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm1 PROC
+ movq mm1, [esp + 4]
+ ret
+_AsmWriteMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm1.s b/MdePkg/Library/BaseLib/ia32/WriteMm1.s new file mode 100644 index 0000000000..e3a492f9ec --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm1.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm1.Asm
+#
+# Abstract:
+#
+# AsmWriteMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm1 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm1
+_AsmWriteMm1:
+ movq 4(%esp),%mm1
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm2.asm b/MdePkg/Library/BaseLib/ia32/WriteMm2.asm new file mode 100644 index 0000000000..a18417a0d1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm2 PROC
+ movq mm2, [esp + 4]
+ ret
+_AsmWriteMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm2.s b/MdePkg/Library/BaseLib/ia32/WriteMm2.s new file mode 100644 index 0000000000..eaebb37636 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm2.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm2.Asm
+#
+# Abstract:
+#
+# AsmWriteMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm2 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm2
+_AsmWriteMm2:
+ movq 4(%esp),%mm2
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm3.asm b/MdePkg/Library/BaseLib/ia32/WriteMm3.asm new file mode 100644 index 0000000000..7aad49f77f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm3 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm3 PROC
+ movq mm3, [esp + 4]
+ ret
+_AsmWriteMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm3.s b/MdePkg/Library/BaseLib/ia32/WriteMm3.s new file mode 100644 index 0000000000..a514091732 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm3.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm3.Asm
+#
+# Abstract:
+#
+# AsmWriteMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm3 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm3
+_AsmWriteMm3:
+ movq 4(%esp),%mm3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm4.asm b/MdePkg/Library/BaseLib/ia32/WriteMm4.asm new file mode 100644 index 0000000000..8be9c4beb8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm4 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm4 PROC
+ movq mm4, [esp + 4]
+ ret
+_AsmWriteMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm4.s b/MdePkg/Library/BaseLib/ia32/WriteMm4.s new file mode 100644 index 0000000000..6d4a6cdce1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm4.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm4.Asm
+#
+# Abstract:
+#
+# AsmWriteMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm4 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm4
+_AsmWriteMm4:
+ movq 4(%esp),%mm4
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm5.asm b/MdePkg/Library/BaseLib/ia32/WriteMm5.asm new file mode 100644 index 0000000000..bc501b397c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm5 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm5 PROC
+ movq mm5, [esp + 4]
+ ret
+_AsmWriteMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm5.s b/MdePkg/Library/BaseLib/ia32/WriteMm5.s new file mode 100644 index 0000000000..15d433271f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm5.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm5.Asm
+#
+# Abstract:
+#
+# AsmWriteMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm5 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm5
+_AsmWriteMm5:
+ movq 4(%esp),%mm5
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm6.asm b/MdePkg/Library/BaseLib/ia32/WriteMm6.asm new file mode 100644 index 0000000000..4a6445cb63 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm6 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm6 PROC
+ movq mm6, [esp + 4]
+ ret
+_AsmWriteMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm6.s b/MdePkg/Library/BaseLib/ia32/WriteMm6.s new file mode 100644 index 0000000000..6b1361e7a3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm6.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm6.Asm
+#
+# Abstract:
+#
+# AsmWriteMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm6 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm6
+_AsmWriteMm6:
+ movq 4(%esp),%mm6
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm7.asm b/MdePkg/Library/BaseLib/ia32/WriteMm7.asm new file mode 100644 index 0000000000..3bc73fed27 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm7 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm7 PROC
+ movq mm7, [esp + 4]
+ ret
+_AsmWriteMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm7.s b/MdePkg/Library/BaseLib/ia32/WriteMm7.s new file mode 100644 index 0000000000..d702fbb242 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm7.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm7.Asm
+#
+# Abstract:
+#
+# AsmWriteMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm7 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm7
+_AsmWriteMm7:
+ movq 4(%esp),%mm7
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr32.asm b/MdePkg/Library/BaseLib/ia32/WriteMsr32.asm new file mode 100644 index 0000000000..ba14514c93 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr32.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr32.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmWriteMsr32 (
+; IN UINT32 Index,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMsr32 PROC
+ mov eax, [esp + 8]
+ xor edx, edx
+ mov ecx, [esp + 4]
+ wrmsr
+ ret
+_AsmWriteMsr32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr32.s b/MdePkg/Library/BaseLib/ia32/WriteMsr32.s new file mode 100644 index 0000000000..450b3b7b9f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr32.s @@ -0,0 +1,45 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMsr32.Asm
+#
+# Abstract:
+#
+# AsmWriteMsr32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# AsmWriteMsr32 (
+# IN UINT32 Index,
+# IN UINT32 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMsr32
+_AsmWriteMsr32:
+ movl 8(%esp),%eax
+ xorl %edx,%edx
+ movl 4(%esp),%ecx
+ wrmsr
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr64.asm b/MdePkg/Library/BaseLib/ia32/WriteMsr64.asm new file mode 100644 index 0000000000..5afc074291 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr64.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMsr64 PROC
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ mov ecx, [esp + 4]
+ wrmsr
+ ret
+_AsmWriteMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr64.s b/MdePkg/Library/BaseLib/ia32/WriteMsr64.s new file mode 100644 index 0000000000..802aad7803 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr64.s @@ -0,0 +1,45 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMsr64.Asm
+#
+# Abstract:
+#
+# AsmWriteMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMsr64 (
+# IN UINT32 Index,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMsr64
+_AsmWriteMsr64:
+ movl 12(%esp),%edx
+ movl 8(%esp),%eax
+ movl 4(%esp),%ecx
+ wrmsr
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/x64/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/x64/CpuBreakpoint.asm new file mode 100644 index 0000000000..f1ebe47b21 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuBreakpoint.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuBreakpoint PROC
+ int 3
+ ret
+CpuBreakpoint ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuFlushTlb.asm b/MdePkg/Library/BaseLib/x64/CpuFlushTlb.asm new file mode 100644 index 0000000000..c2c4490e9d --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuFlushTlb.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuFlushTlb PROC
+ mov rax, cr3
+ mov cr3, rax
+ ret
+CpuFlushTlb ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuId.asm b/MdePkg/Library/BaseLib/x64/CpuId.asm new file mode 100644 index 0000000000..867e92a677 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuId.asm @@ -0,0 +1,62 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; )
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES rbx
+ mov eax, ecx
+ push rdx
+ push rax ; save Index on stack
+ cpuid
+ test r9, r9
+ jz @F
+ mov [r9], ecx
+@@:
+ pop rcx
+ jrcxz @F
+ mov [rcx], eax
+@@:
+ mov rcx, r8
+ jrcxz @F
+ mov [rcx], ebx
+@@:
+ mov rcx, [rsp + 30h]
+ jrcxz @F
+ mov [rcx], edx
+@@:
+ pop rax ; restore Index to rax as return value
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuPause.asm b/MdePkg/Library/BaseLib/x64/CpuPause.asm new file mode 100644 index 0000000000..d16da37712 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuPause.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuPause PROC
+ pause
+ ret
+CpuPause ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuSleep.asm b/MdePkg/Library/BaseLib/x64/CpuSleep.asm new file mode 100644 index 0000000000..b2c4907032 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuSleep.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuSleep PROC
+ hlt
+ ret
+CpuSleep ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/DisableInterrupts.asm b/MdePkg/Library/BaseLib/x64/DisableInterrupts.asm new file mode 100644 index 0000000000..586832c1a2 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/DisableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+DisableInterrupts PROC
+ cli
+ ret
+DisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/DisablePaging64.asm b/MdePkg/Library/BaseLib/x64/DisablePaging64.asm new file mode 100644 index 0000000000..3134e42571 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/DisablePaging64.asm @@ -0,0 +1,54 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging64.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86DisablePaging64 PROC
+ cli
+ shl rcx, 32
+ lea ecx, @F
+ push rcx
+ mov ebx, edx
+ mov esi, r8d
+ mov edi, r9d
+ mov eax, [rsp + 28h]
+ retf
+@@:
+ mov esp, eax ; set up new stack
+ mov rax, cr0
+ btr eax, 31
+ mov cr0, rax ; disable paging
+ mov ecx, 0c0000080h
+ rdmsr
+ and ah, NOT 1 ; clear LME
+ wrmsr
+ mov rax, cr4
+ and al, NOT (1 SHL 5) ; clear PAE
+ mov cr4, rax
+ push rdi
+ push rsi
+ call rbx
+ jmp $
+InternalX86DisablePaging64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/x64/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..0d0400f007 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/EnableDisableInterrupts.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+EnableDisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/EnableInterrupts.asm b/MdePkg/Library/BaseLib/x64/EnableInterrupts.asm new file mode 100644 index 0000000000..8fb4adfe37 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/EnableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableInterrupts PROC
+ sti
+ ret
+EnableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/FlushCacheLine.asm b/MdePkg/Library/BaseLib/x64/FlushCacheLine.asm new file mode 100644 index 0000000000..1d470e8753 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/FlushCacheLine.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ clflush [rcx]
+ ret
+AsmFlushCacheLine ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/FxRestore.asm b/MdePkg/Library/BaseLib/x64/FxRestore.asm new file mode 100644 index 0000000000..8acfc2f00f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/FxRestore.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86FxRestore PROC
+ fxrstor [rcx]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/FxSave.asm b/MdePkg/Library/BaseLib/x64/FxSave.asm new file mode 100644 index 0000000000..cacb1f5283 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/FxSave.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86FxSave PROC
+ fxsave [rcx]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange32.asm b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..55b055453f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange32.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov eax, edx
+ lock cmpxchg [rcx], r8d
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange64.asm b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..88c25a56de --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InterlockedCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC
+ mov rax, rdx
+ lock cmpxchg [rcx], r8
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedDecrement.asm b/MdePkg/Library/BaseLib/x64/InterlockedDecrement.asm new file mode 100644 index 0000000000..f907fed4a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedDecrement.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ lock dec dword ptr [rcx]
+ mov eax, [rcx]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedIncrement.asm b/MdePkg/Library/BaseLib/x64/InterlockedIncrement.asm new file mode 100644 index 0000000000..f5a4130bf1 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedIncrement.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ lock inc dword ptr [rcx]
+ mov eax, [rcx]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Invd.asm b/MdePkg/Library/BaseLib/x64/Invd.asm new file mode 100644 index 0000000000..446587923b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Invd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmInvd PROC
+ invd
+ ret
+AsmInvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/LongJump.asm b/MdePkg/Library/BaseLib/x64/LongJump.asm new file mode 100644 index 0000000000..6634778592 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/LongJump.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of LongJump() on x64.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+LongJump PROC
+ mov rbx, [rcx]
+ mov rsp, [rcx + 8]
+ mov rbp, [rcx + 10h]
+ mov rdi, [rcx + 18h]
+ mov rsi, [rcx + 20h]
+ mov r12, [rcx + 28h]
+ mov r13, [rcx + 30h]
+ mov r14, [rcx + 38h]
+ mov r15, [rcx + 40h]
+ mov rax, rdx
+ jmp qword ptr [rcx + 48h]
+LongJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Monitor.asm b/MdePkg/Library/BaseLib/x64/Monitor.asm new file mode 100644 index 0000000000..0140494d30 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Monitor.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+AsmMonitor PROC
+ mov eax, ecx
+ mov ecx, edx
+ mov edx, r8d
+ DB 0fh, 1, 0c8h
+ ret
+AsmMonitor ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Mwait.asm b/MdePkg/Library/BaseLib/x64/Mwait.asm new file mode 100644 index 0000000000..8f76d944f1 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Mwait.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+AsmMwait PROC
+ mov eax, ecx
+ mov ecx, edx
+ DB 0fh, 1, 0c9h
+ ret
+AsmMwait ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Non-existing.c b/MdePkg/Library/BaseLib/x64/Non-existing.c new file mode 100644 index 0000000000..b2c737857d --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Non-existing.c @@ -0,0 +1,54 @@ +/** @file
+ Non-existing BaseLib functions on x64
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID
+EFIAPI
+InternalX86EnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ )
+{
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr0.asm b/MdePkg/Library/BaseLib/x64/ReadCr0.asm new file mode 100644 index 0000000000..3e369c3a81 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr0 PROC
+ mov rax, cr0
+ ret
+AsmReadCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr2.asm b/MdePkg/Library/BaseLib/x64/ReadCr2.asm new file mode 100644 index 0000000000..8476f5af18 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr2 PROC
+ mov rax, cr2
+ ret
+AsmReadCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr3.asm b/MdePkg/Library/BaseLib/x64/ReadCr3.asm new file mode 100644 index 0000000000..af54d46373 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr3 PROC
+ mov rax, cr3
+ ret
+AsmReadCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr4.asm b/MdePkg/Library/BaseLib/x64/ReadCr4.asm new file mode 100644 index 0000000000..c8a881db9e --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr4 PROC
+ mov rax, cr4
+ ret
+AsmReadCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCs.asm b/MdePkg/Library/BaseLib/x64/ReadCs.asm new file mode 100644 index 0000000000..126149a47c --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCs PROC
+ mov ax, cs
+ ret
+AsmReadCs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr0.asm b/MdePkg/Library/BaseLib/x64/ReadDr0.asm new file mode 100644 index 0000000000..7e0d6b714a --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr0 PROC
+ mov rax, dr0
+ ret
+AsmReadDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr1.asm b/MdePkg/Library/BaseLib/x64/ReadDr1.asm new file mode 100644 index 0000000000..22f11c4e0f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr1 PROC
+ mov rax, dr1
+ ret
+AsmReadDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr2.asm b/MdePkg/Library/BaseLib/x64/ReadDr2.asm new file mode 100644 index 0000000000..3b81605861 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr2 PROC
+ mov rax, dr2
+ ret
+AsmReadDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr3.asm b/MdePkg/Library/BaseLib/x64/ReadDr3.asm new file mode 100644 index 0000000000..1968fd0d67 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr3 PROC
+ mov rax, dr3
+ ret
+AsmReadDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr4.asm b/MdePkg/Library/BaseLib/x64/ReadDr4.asm new file mode 100644 index 0000000000..97740016b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr4 PROC
+ DB 0fh, 21h, 0e0h
+ ret
+AsmReadDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr5.asm b/MdePkg/Library/BaseLib/x64/ReadDr5.asm new file mode 100644 index 0000000000..0582502220 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr5 PROC
+ DB 0fh, 21h, 0e8h
+ ret
+AsmReadDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr6.asm b/MdePkg/Library/BaseLib/x64/ReadDr6.asm new file mode 100644 index 0000000000..a3dafb9b9f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr6 PROC
+ mov rax, dr6
+ ret
+AsmReadDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr7.asm b/MdePkg/Library/BaseLib/x64/ReadDr7.asm new file mode 100644 index 0000000000..0cff14b5c4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr7 PROC
+ mov rax, dr7
+ ret
+AsmReadDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDs.asm b/MdePkg/Library/BaseLib/x64/ReadDs.asm new file mode 100644 index 0000000000..bdcddb65d8 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDs.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDs PROC
+ mov ax, ds
+ ret
+AsmReadDs ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseLib/x64/ReadEflags.asm b/MdePkg/Library/BaseLib/x64/ReadEflags.asm new file mode 100644 index 0000000000..174ae95887 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadEflags.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEflags PROC
+ pushfq
+ pop rax
+ ret
+AsmReadEflags ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadEs.asm b/MdePkg/Library/BaseLib/x64/ReadEs.asm new file mode 100644 index 0000000000..40384bcd71 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadEs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEs PROC
+ mov ax, es
+ ret
+AsmReadEs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadFs.asm b/MdePkg/Library/BaseLib/x64/ReadFs.asm new file mode 100644 index 0000000000..b63e474023 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadFs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadFs PROC
+ mov ax, fs
+ ret
+AsmReadFs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadGdtr.asm b/MdePkg/Library/BaseLib/x64/ReadGdtr.asm new file mode 100644 index 0000000000..2d40599a8b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadGdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86ReadGdtr PROC
+ sgdt fword ptr [rcx]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadGs.asm b/MdePkg/Library/BaseLib/x64/ReadGs.asm new file mode 100644 index 0000000000..02d140e670 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadGs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadGs PROC
+ mov ax, gs
+ ret
+AsmReadGs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadIdtr.asm b/MdePkg/Library/BaseLib/x64/ReadIdtr.asm new file mode 100644 index 0000000000..260f697178 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadIdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86ReadIdtr PROC
+ sidt fword ptr [rcx]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadLdtr.asm b/MdePkg/Library/BaseLib/x64/ReadLdtr.asm new file mode 100644 index 0000000000..3d6a2f8843 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadLdtr PROC
+ sldt eax
+ ret
+AsmReadLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm0.asm b/MdePkg/Library/BaseLib/x64/ReadMm0.asm new file mode 100644 index 0000000000..1239bcacd6 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm0 PROC
+ DB 48h, 0fh, 7eh, 0c0h
+ ret
+AsmReadMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm1.asm b/MdePkg/Library/BaseLib/x64/ReadMm1.asm new file mode 100644 index 0000000000..b42bd7f63f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm1 PROC
+ DB 48h, 0fh, 7eh, 0c8h
+ ret
+AsmReadMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm2.asm b/MdePkg/Library/BaseLib/x64/ReadMm2.asm new file mode 100644 index 0000000000..b10782e403 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm2 PROC
+ DB 48h, 0fh, 7eh, 0d0h
+ ret
+AsmReadMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm3.asm b/MdePkg/Library/BaseLib/x64/ReadMm3.asm new file mode 100644 index 0000000000..15a96475bd --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm3 PROC
+ DB 48h, 0fh, 7eh, 0d8h
+ ret
+AsmReadMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm4.asm b/MdePkg/Library/BaseLib/x64/ReadMm4.asm new file mode 100644 index 0000000000..73f528342e --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm4 PROC
+ DB 48h, 0fh, 7eh, 0e0h
+ ret
+AsmReadMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm5.asm b/MdePkg/Library/BaseLib/x64/ReadMm5.asm new file mode 100644 index 0000000000..a487889480 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm5 PROC
+ DB 48h, 0fh, 7eh, 0e8h
+ ret
+AsmReadMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm6.asm b/MdePkg/Library/BaseLib/x64/ReadMm6.asm new file mode 100644 index 0000000000..56f81bf7b1 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm6 PROC
+ DB 48h, 0fh, 7eh, 0f0h
+ ret
+AsmReadMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm7.asm b/MdePkg/Library/BaseLib/x64/ReadMm7.asm new file mode 100644 index 0000000000..e3ad6bb658 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm7 PROC
+ DB 48h, 0fh, 7eh, 0f8h
+ ret
+AsmReadMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMsr32.asm b/MdePkg/Library/BaseLib/x64/ReadMsr32.asm new file mode 100644 index 0000000000..271eabbeae --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMsr32.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr32.Asm
+;
+; Abstract:
+;
+; AsmReadMsr32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmReadMsr32 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr32 PROC
+ rdmsr
+ ret
+AsmReadMsr32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMsr64.asm b/MdePkg/Library/BaseLib/x64/ReadMsr64.asm new file mode 100644 index 0000000000..4444c18676 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMsr64.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr64 PROC
+ rdmsr
+ shl rax, 20h
+ shrd rax, rdx, 20h
+ ret
+AsmReadMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadPmc.asm b/MdePkg/Library/BaseLib/x64/ReadPmc.asm new file mode 100644 index 0000000000..b5004d6f34 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadPmc.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+AsmReadPmc PROC
+ rdpmc
+ shl ecx, 1
+ jnc @F
+ shl rax, 20h
+ shrd rax, rdx, 20h
+@@:
+ ret
+AsmReadPmc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadSs.asm b/MdePkg/Library/BaseLib/x64/ReadSs.asm new file mode 100644 index 0000000000..4aa480d71b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadSs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadSs PROC
+ mov ax, ss
+ ret
+AsmReadSs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadTr.asm b/MdePkg/Library/BaseLib/x64/ReadTr.asm new file mode 100644 index 0000000000..7cf8cdfd43 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadTr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTr PROC
+ str eax
+ ret
+AsmReadTr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadTsc.asm b/MdePkg/Library/BaseLib/x64/ReadTsc.asm new file mode 100644 index 0000000000..25fa2cc5d8 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTsc PROC
+ rdtsc
+ shl rax, 20h
+ shrd rax, rdx, 20h
+ ret
+AsmReadTsc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/SetJump.asm b/MdePkg/Library/BaseLib/x64/SetJump.asm new file mode 100644 index 0000000000..305e721b8b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/SetJump.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on x64.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+SetJump PROC
+ pop rdx
+ mov [rcx], rbx
+ mov [rcx + 8], rsp
+ mov [rcx + 10h], rbp
+ mov [rcx + 18h], rdi
+ mov [rcx + 20h], rsi
+ mov [rcx + 28h], r12
+ mov [rcx + 30h], r13
+ mov [rcx + 38h], r14
+ mov [rcx + 40h], r15
+ mov [rcx + 48h], rdx
+ xor rax, rax
+ jmp rdx
+SetJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/SwitchStack.asm b/MdePkg/Library/BaseLib/x64/SwitchStack.asm new file mode 100644 index 0000000000..0dfddc011b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/SwitchStack.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SwitchStack.Asm
+;
+; Abstract:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; Routine Description:
+;
+; Routine for switching stacks with 1 parameter
+;
+; Arguments:
+;
+; (rcx) EntryPoint - Entry point with new stack.
+; (rdx) Context - Parameter for entry point.
+; (r8) Context2 - Parameter2 for entry point.
+; (r9) NewStack - Pointer to new stack.
+;
+; Returns:
+;
+; None
+;
+;------------------------------------------------------------------------------
+SwitchStack PROC
+ mov rax, rcx
+ mov rcx, rdx
+ mov rdx, r8
+ lea rsp, [r9 - 20h]
+ call rax
+SwitchStack ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Thunk16.asm b/MdePkg/Library/BaseLib/x64/Thunk16.asm new file mode 100644 index 0000000000..f3e80840b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Thunk16.asm @@ -0,0 +1,189 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .data
+
+NullSegSel DQ 0
+_16CsSegSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment
+ DB 0
+_16BitDsSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment
+ DB 0
+GdtEnd LABEL QWORD
+
+ .const
+
+_16Gdtr LABEL FWORD
+ DW offset GdtEnd - offset NullSegSel - 1
+ DQ offset NullSegSel
+
+_16Idtr FWORD (1 SHL 10) - 1
+
+ .code
+
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_RFLAGS DQ ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+InternalAsmThunk16 PROC USES rbp rbx rsi rdi r12 r13 r14 r15
+ mov eax, ds
+ push rax
+ mov eax, es
+ push rax
+ push fs
+ push gs
+ mov rsi, rcx ; rsi <- RegSet
+ push sizeof (IA32_REGS)
+ pop rcx
+ movzx r8, (IA32_REGS ptr [rsi])._SS
+ xor rdi, rdi
+ mov edi, (IA32_REGS ptr [rsi])._ESP
+ sub rdi, rcx ; reserve space on realmode stack
+ push rdi ; save stack offset
+ imul rax, r8, 16
+ add rdi, rax ; rdi <- linear address of 16-bit stack
+ rep movsb ; copy RegSet
+ mov rsi, r8 ; si <- 16-bit stack segment
+ pop rbx ; rbx <- 16-bit stack offset
+ mov rdi, rdx ; rdi <- realmode patch
+ lea eax, @BackToThunk ; rax <- address to back from real mode
+ push rax ; use in a far return
+ mov eax, cs
+ mov [rsp + 4], eax ; save CS
+ lea eax, @16Return ; thus @Return must < 4GB
+ stosd ; set ret address offset
+ xor eax, eax
+ stosw ; set ret CS base to 0
+ mov eax, esp
+ stosd ; rsp must < 4GB
+ mov eax, ss
+ stosd
+ mov rax, cr0
+ mov ecx, eax ; ecx <- CR0
+ and ecx, 7ffffffeh ; clear PE, PG bits
+ stosd
+ mov rax, cr4
+ mov ebp, eax
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ stosd
+ sidt fword ptr [rsp + 70h] ; use parameter space to save IDTR
+ sgdt fword ptr [rdi]
+ lea edi, _16Idtr
+ lea eax, @16Start ; rax <- seg:offset of @16Start
+ push rax
+ mov dword ptr [rsp + 4], 8
+ push 10h
+ pop rax ; rax <- 10h as dataseg selector
+ lgdt _16Gdtr
+ retf
+@16Start: ; 16-bit starts here
+ mov ss, eax ; set SS to be a 16-bit segment
+ mov cr0, rcx ; disable protected mode
+ mov cr4, rbp
+ DB 66h
+ mov ecx, 0c0000080h
+ rdmsr
+ and ah, NOT 1 ; clear LME
+ wrmsr
+ mov ss, esi ; set up 16-bit stack
+ mov sp, bx ; mov esp, ebx actually
+ lidt fword ptr [edi]
+ DB 66h, 61h ; popad
+ DB 1fh ; pop ds
+ DB 7 ; pop es
+ pop fs
+ pop gs
+ add sp, 8 ; skip _RFLAGS
+ DB 66h
+ retf ; transfer control to 16-bit code
+@16Return:
+ DB 66h
+ push 0 ; high order 32 bits of rflags
+ pushf ; pushfd actually
+ push gs
+ push fs
+ DB 6 ; push es
+ DB 1eh ; push ds
+ DB 66h, 60h ; pushad
+ DB 67h, 66h, 0c5h, 74h, 24h, 30h ; lds esi, [esp + 12*4]
+ DB 66h
+ mov eax, [esi + 12]
+ mov cr4, rax ; restore CR4
+ DB 66h
+ lgdt fword ptr [esi + 16]
+ DB 66h
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ DB 66h
+ mov eax, [esi + 8]
+ mov cr0, rax ; restore CR0
+ xor ax, ax ; xor eax, eax actually
+ mov eax, ss
+ mov dword ptr (IA32_REGS ptr [esp])._SS, eax
+ shl ax, 4 ; shl eax, 4 actually
+ add ax, sp ; add eax, esp actually
+ add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)
+ DB 66h
+ mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp
+ DB 66h
+ lss esp, fword ptr [esi] ; restore protected mode stack
+ DB 66h
+ retf ; go back to protected mode
+@BackToThunk:
+ lidt fword ptr [rsp + 68h] ; restore protected mode IDTR
+ shl rax, 32
+ shr rax, 32 ; clear high order 32 bits of RAX
+ pop gs
+ pop fs
+ pop rcx
+ mov es, ecx
+ pop rcx
+ mov ds, ecx
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Wbinvd.asm b/MdePkg/Library/BaseLib/x64/Wbinvd.asm new file mode 100644 index 0000000000..ca0cb252b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Wbinvd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWbinvd PROC
+ wbinvd
+ ret
+AsmWbinvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr0.asm b/MdePkg/Library/BaseLib/x64/WriteCr0.asm new file mode 100644 index 0000000000..defc7e7c96 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr0 PROC
+ mov cr0, rcx
+ ret
+AsmWriteCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr2.asm b/MdePkg/Library/BaseLib/x64/WriteCr2.asm new file mode 100644 index 0000000000..ebe6f89d62 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr2 PROC
+ mov cr2, rcx
+ ret
+AsmWriteCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr3.asm b/MdePkg/Library/BaseLib/x64/WriteCr3.asm new file mode 100644 index 0000000000..5715dea9b7 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr3 PROC
+ mov cr3, rcx
+ ret
+AsmWriteCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr4.asm b/MdePkg/Library/BaseLib/x64/WriteCr4.asm new file mode 100644 index 0000000000..210744e16f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr4 PROC
+ mov cr4, rcx
+ ret
+AsmWriteCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr0.asm b/MdePkg/Library/BaseLib/x64/WriteDr0.asm new file mode 100644 index 0000000000..2515a20404 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr0 PROC
+ mov dr0, rcx
+ ret
+AsmWriteDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr1.asm b/MdePkg/Library/BaseLib/x64/WriteDr1.asm new file mode 100644 index 0000000000..89f36ac3f9 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr1 PROC
+ mov dr1, rcx
+ ret
+AsmWriteDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr2.asm b/MdePkg/Library/BaseLib/x64/WriteDr2.asm new file mode 100644 index 0000000000..820977c2e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr2 PROC
+ mov dr2, rcx
+ ret
+AsmWriteDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr3.asm b/MdePkg/Library/BaseLib/x64/WriteDr3.asm new file mode 100644 index 0000000000..51c1407277 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr3 PROC
+ mov dr3, rcx
+ ret
+AsmWriteDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr4.asm b/MdePkg/Library/BaseLib/x64/WriteDr4.asm new file mode 100644 index 0000000000..12b643825b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr4 PROC
+ DB 0fh, 23h, 0e1h
+ ret
+AsmWriteDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr5.asm b/MdePkg/Library/BaseLib/x64/WriteDr5.asm new file mode 100644 index 0000000000..6d454d5267 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr5 PROC
+ DB 0fh, 23h, 0e9h
+ ret
+AsmWriteDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr6.asm b/MdePkg/Library/BaseLib/x64/WriteDr6.asm new file mode 100644 index 0000000000..b7b9f2509d --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr6 PROC
+ mov dr6, rcx
+ ret
+AsmWriteDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr7.asm b/MdePkg/Library/BaseLib/x64/WriteDr7.asm new file mode 100644 index 0000000000..de2237b6e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr7 PROC
+ mov dr7, rcx
+ ret
+AsmWriteDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteGdtr.asm b/MdePkg/Library/BaseLib/x64/WriteGdtr.asm new file mode 100644 index 0000000000..1757e3dea4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteGdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86WriteGdtr PROC
+ lgdt fword ptr [rcx]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteIdtr.asm b/MdePkg/Library/BaseLib/x64/WriteIdtr.asm new file mode 100644 index 0000000000..09fcb9e457 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteIdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86WriteIdtr PROC
+ lidt fword ptr [rcx]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteLdtr.asm b/MdePkg/Library/BaseLib/x64/WriteLdtr.asm new file mode 100644 index 0000000000..d85ae38f29 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+AsmWriteLdtr PROC
+ lldt cx
+ ret
+AsmWriteLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm0.asm b/MdePkg/Library/BaseLib/x64/WriteMm0.asm new file mode 100644 index 0000000000..bb9a576125 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm0 PROC
+ DB 48h, 0fh, 6eh, 0c1h
+ ret
+AsmWriteMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm1.asm b/MdePkg/Library/BaseLib/x64/WriteMm1.asm new file mode 100644 index 0000000000..1bab3bcd8e --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm1 PROC
+ DB 48h, 0fh, 6eh, 0c9h
+ ret
+AsmWriteMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm2.asm b/MdePkg/Library/BaseLib/x64/WriteMm2.asm new file mode 100644 index 0000000000..97e8a6a676 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm2 PROC
+ DB 48h, 0fh, 6eh, 0d1h
+ ret
+AsmWriteMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm3.asm b/MdePkg/Library/BaseLib/x64/WriteMm3.asm new file mode 100644 index 0000000000..d55e19a406 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm3 PROC
+ DB 48h, 0fh, 6eh, 0d9h
+ ret
+AsmWriteMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm4.asm b/MdePkg/Library/BaseLib/x64/WriteMm4.asm new file mode 100644 index 0000000000..2a69b93bcc --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm4 PROC
+ DB 48h, 0fh, 6eh, 0e1h
+ ret
+AsmWriteMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm5.asm b/MdePkg/Library/BaseLib/x64/WriteMm5.asm new file mode 100644 index 0000000000..c4d798bcbd --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm5 PROC
+ DB 48h, 0fh, 6eh, 0e9h
+ ret
+AsmWriteMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm6.asm b/MdePkg/Library/BaseLib/x64/WriteMm6.asm new file mode 100644 index 0000000000..c0164f66da --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm6 PROC
+ DB 48h, 0fh, 6eh, 0f1h
+ ret
+AsmWriteMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm7.asm b/MdePkg/Library/BaseLib/x64/WriteMm7.asm new file mode 100644 index 0000000000..20768e2b78 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm7 PROC
+ DB 48h, 0fh, 6eh, 0f9h
+ ret
+AsmWriteMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMsr32.asm b/MdePkg/Library/BaseLib/x64/WriteMsr32.asm new file mode 100644 index 0000000000..0a74403624 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMsr32.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr32.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmWriteMsr32 (
+; IN UINT32 Index,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr32 PROC
+ mov eax, edx
+ xor edx, edx
+ wrmsr
+ ret
+AsmWriteMsr32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMsr64.asm b/MdePkg/Library/BaseLib/x64/WriteMsr64.asm new file mode 100644 index 0000000000..3337f45891 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMsr64.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr64 PROC
+ push rdx
+ mov eax, edx
+ shr rdx, 20h
+ wrmsr
+ pop rax
+ ret
+AsmWriteMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x86LowLevel.c b/MdePkg/Library/BaseLib/x86LowLevel.c new file mode 100644 index 0000000000..c222c6ccb6 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86LowLevel.c @@ -0,0 +1,979 @@ +/** @file
+ IA-32/x64 specific functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86LowLevel.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+//
+// Bit-wise MSR operations
+//
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
+ writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the lower 32-bits of the read result and the value specified by
+ OrData, and writes the result to the 64-bit MSR specified by Index. The lower
+ 32-bits of the value written to the MSR is returned. No parameter checking is
+ performed on Index or OrData, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and OrData are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrOr32 (
+ IN UINT32 Index,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrOr64 (Index, OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
+ the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData, and
+ writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
+ the value written to the MSR is returned. No parameter checking is performed
+ on Index or AndData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index and AndData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAnd32 (
+ IN UINT32 Index,
+ IN UINT32 AndData
+ )
+{
+ return (UINT32)AsmMsrAnd64 (Index, AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
+ on the lower 32-bits, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData
+ preserving the upper 32-bits, performs a bitwise inclusive OR between the
+ result of the AND operation and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Address. The lower 32-bits of the value
+ written to the MSR is returned. No parameter checking is performed on Index,
+ AndData, or OrData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index, AndData, and OrData are valid, or the
+ caller must establish proper exception handlers. This function is only
+ available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAndThenOr32 (
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned. The caller must either guarantee that Index is valid, or the caller
+ must set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read from the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldRead32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination MSR are preserved. The lower 32-bits of the MSR written is
+ returned. Extra left bits in Value are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldWrite32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Value) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The lower 32-bits of the value
+ written to the MSR are returned. Extra left bits in OrData are stripped. The
+ caller must either guarantee that Index and the data written is valid, or
+ the caller must set up exception handlers to catch the exceptions. This
+ function is only available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (OrData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The lower 32-bits of the value written to the
+ MSR are returned. Extra left bits in AndData are stripped. The caller must
+ either guarantee that Index and the data written is valid, or the caller must
+ set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAnd32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
+ bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ lower 32-bits of the value written to the MSR are returned. Extra left bits
+ in both AndData and OrData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAndThenOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAndThenOr64 (
+ Index,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
+ back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. No parameter checking is performed on Index or OrData, and some of
+ these may cause CPU exceptions. The caller must either guarantee that Index
+ and OrData are valid, or the caller must establish proper exception handlers.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrOr64 (
+ IN UINT32 Index,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by OrData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned. No
+ parameter checking is performed on Index or OrData, and some of these may
+ cause CPU exceptions. The caller must either guarantee that Index and OrData
+ are valid, or the caller must establish proper exception handlers. This
+ function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAnd64 (
+ IN UINT32 Index,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
+ OR, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
+ result and the value specified by AndData, performs a bitwise inclusive OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit MSR specified by Index. The value written
+ to the MSR is returned. No parameter checking is performed on Index, AndData,
+ or OrData, and some of these may cause CPU exceptions. The caller must either
+ guarantee that Index, AndData, and OrData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAndThenOr64 (
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the 64-bit MSR. The bit field is specified by the
+ StartBit and the EndBit. The value of the bit field is returned. The caller
+ must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldRead64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
+ the StartBit and the EndBit. All other bits in the destination MSR are
+ preserved. The MSR written is returned. Extra left bits in Value are
+ stripped. The caller must either guarantee that Index and the data written is
+ valid, or the caller must set up exception handlers to catch the exceptions.
+ This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldWrite64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
+ writes the result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. Extra left bits in OrData are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned.
+ Extra left bits in AndData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAnd64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
+ a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ value written to the MSR is returned. Extra left bits in both AndData and
+ OrData are stripped. The caller must either guarantee that Index and the data
+ written is valid, or the caller must set up exception handlers to catch the
+ exceptions. This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAndThenOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAndThenOr64 (
+ AsmReadMsr64 (Index),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ )
+ );
+}
+
+//
+// Base Library CPU Functions
+//
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ IA32_EFLAGS32 EFlags;
+
+ EFlags.UintN = AsmReadEflags ();
+ return (BOOLEAN)(EFlags.Bits.IF == 1);
+}
+
+//
+// Ia32 and x64 specific functions
+//
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86ReadGdtr (Gdtr);
+}
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86WriteGdtr (Gdtr);
+}
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86ReadIdtr (Idtr);
+}
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86WriteIdtr (Idtr);
+}
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+ InternalX86FxSave (Buffer);
+}
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Buffer was not saved with AsmFxSave(), then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+ InternalX86FxRestore (Buffer);
+}
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit paged mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode with flat
+ descriptors, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 64-bit paged mode, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
+
+//
+// x86 version of MemoryFence()
+//
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+}
diff --git a/MdePkg/Library/BaseLib/x86Thunk.c b/MdePkg/Library/BaseLib/x86Thunk.c new file mode 100644 index 0000000000..8cb5f4f8bd --- /dev/null +++ b/MdePkg/Library/BaseLib/x86Thunk.c @@ -0,0 +1,127 @@ +/** @file
+ Real Mode Thunk Functions for IA32 and X64.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Thunk.c
+
+**/
+
+/**
+ Invokes 16-bit code in big real mode and returns the updated register set.
+
+ This function transfers control to the 16-bit code specified by CS:EIP using
+ the stack specified by SS:ESP in RegisterSet. The updated registers are saved
+ on the real mode stack and the starting address of the save area is returned.
+
+ @param RegisterSet Values of registers before invocation of 16-bit code.
+ @param Patch Pointer to the area following the 16-bit code.
+
+ @return The pointer to a IA32_REGISTER_SET structure containing the updated
+ register values.
+
+**/
+IA32_REGISTER_SET *
+InternalAsmThunk16 (
+ IN IA32_REGISTER_SET *RegisterSet,
+ IN OUT VOID *Patch
+ );
+
+/**
+ Prepares all structures a code required to use AsmThunk16().
+
+ Prepares all structures and code required to use AsmThunk16().
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareThunk16 (
+ OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ ASSERT (ThunkContext != NULL);
+}
+
+/**
+ Transfers control to a 16-bit real mode entry point and returns the results.
+
+ Transfers control to a 16-bit real mode entry point and returns the results.
+ AsmPrepareThunk16() must be called with ThunkContext before this function is
+ used. This function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+ If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ UINT16 *Patch;
+
+ ASSERT (ThunkContext != NULL);
+
+ Patch = (UINT16*)(
+ (UINTN)ThunkContext->RealModeCode +
+ ThunkContext->RealModeCodeSize
+ );
+
+ //
+ // 0x9a66 is the OpCode of far call with an operand size override.
+ //
+ *Patch = 0x9a66;
+
+ //
+ // CopyMem() here copies the updated register values back to RealModeState
+ //
+ CopyMem (
+ &ThunkContext->RealModeState,
+ InternalAsmThunk16 (&ThunkContext->RealModeState, Patch + 1),
+ sizeof (ThunkContext->RealModeState)
+ );
+}
+
+/**
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results.
+
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results. If the
+ caller only need to perform a single 16-bit real mode thunk, then this
+ service should be used. If the caller intends to make more than one 16-bit
+ real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
+ once and AsmThunk16() can be called for each 16-bit real mode thunk. This
+ function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareAndThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ AsmPrepareThunk16 (ThunkContext);
+ AsmThunk16 (ThunkContext);
+}
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