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Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 6587212f4e..bf90050503 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1,7 +1,7 @@
/** @file
Page Fault (#PF) handler for X64 processors
-Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -104,8 +104,9 @@ Is5LevelPagingNeeded (
ExtFeatureEcx.Bits.FiveLevelPage
));
- if (VirPhyAddressSize.Bits.PhysicalAddressBits > 4 * 9 + 12) {
- ASSERT (ExtFeatureEcx.Bits.FiveLevelPage == 1);
+ if ((VirPhyAddressSize.Bits.PhysicalAddressBits > 4 * 9 + 12) &&
+ (ExtFeatureEcx.Bits.FiveLevelPage == 1))
+ {
return TRUE;
} else {
return FALSE;