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* ArmPkg: Add Universal/Smbios/ProcessorSubClassDxeRebecca Cran2021-02-088-0/+1387
| | | | | | | | ProcessorSubClassDxe provides SMBIOS CPU information using generic methods combined with calls into OemMiscLib. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
* ArmPkg: Add Universal/Smbios/OemMiscLibNullRebecca Cran2021-02-083-0/+177
| | | | | | | | | | Add a Null implementation of OemMiscLib. OemMiscLib provides functions that platforms implement to fill in SMBIOS information for the SmbiosMiscDxe and ProcessSubClassDxe drivers. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add Library/OemMiscLib.hRebecca Cran2021-02-081-0/+167
| | | | | | | | | OemMiscLib.h provides the interface which platforms should implement to interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to update SMBIOS tables. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Acked-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add helper to read the CCSIDR2 registerRebecca Cran2021-02-083-0/+31
| | | | | | | | Add helper function to read the CCSIDR2 register. This is used when CCIDX is supported in AARCH32 mode. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add helper to read CCIDX statusRebecca Cran2021-02-083-2/+47
| | | | | | | | Add a helper function to determine CCIDX support. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add definition of the maximum cache level in ARMv8-ARebecca Cran2021-02-081-0/+4
| | | | | | | | | | The ARM Architecture Reference Manual for ARMv8-A defines up to seven levels of cache, L1 through L7. Define MAX_ARM_CACHE_LEVEL to be 7. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Update ArmLibPrivate.h with cache register definitionsRebecca Cran2021-02-081-0/+97
| | | | | | | | | Update the cache definitions in ArmLibPrivate.h based on current ARMv8 documentation. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix the return type of the ReadCCSIDR functionRebecca Cran2021-02-084-4/+11
| | | | | | | | | | | | | When CCIDX is supported, the Current Cache Size ID Register contains data above 32 bits: namely the number of sets. Avoid truncating this by returning a UINTN instead of UINT32. On AARCH32, the expanded number of sets data can be read via the CCSIDR2 register. Also, add Doxygen comments for the function. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add helper function to read the Memory Model Feature Register 4Rebecca Cran2021-02-083-2/+14
| | | | | | | | | In AARCH32, CCIDX support is indicated in the MMFR4 register - unlike under AARCH64 where it's in MMFR2. Add a helper function to read it. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Add helper to read the Memory Model Features Register 2Rebecca Cran2021-02-082-0/+14
| | | | | | | | | Add helper function to read the MMFR2 register. We will need this to determine CCIDX support. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add register encoding definition for MMFR2Rebecca Cran2021-02-081-0/+4
| | | | | | | | | | Add register encoding definition for Memory Model Feature Register 2. We need to define it here because we build for ARMv8.0, which doesn't have it. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.hRebecca Cran2021-02-081-0/+16
| | | | | | | | | The ARM SMC Architecture functions were missing from ArmStdSmc.h. Add them, based on the SMC Calling Convention version 1.2 specification. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg/Library: prevent endless reboot loop with emulated NV varstoreLeif Lindholm2021-02-042-4/+9
| | | | | | | | | | | | | | | | If no valid boot options were found, PlatformBootManagerLib refreshes a set of sane default options and then reboots. However, if there is in fact no persistent varstore, the same thing happens again on next boot, and we end up in an endlessly rebooting loop. So when PcdEmuVariableNvModeEnable is TRUE, skip the reboot step and enter the setup menu instead. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg: Fix Ecc error 5007 in DefaultExceptionHandlerLibPierre Gondois2021-01-061-19/+22
| | | | | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Fixing this error implies extracting the CpsrChar array from CpsrString and making it a static variable. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in StandaloneMmMmuLibPierre Gondois2021-01-061-5/+8
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in SemihostLibPierre Gondois2021-01-061-4/+2
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in SemiHostingSerialPortLibPierre Gondois2021-01-061-2/+6
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in ArmMmuLibPierre Gondois2021-01-061-1/+3
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in ArmLibPierre Gondois2021-01-061-15/+5
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in ArmDisassemblerLibPierre Gondois2021-01-061-1/+3
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in ArmCacheMaintenanceLibPierre Gondois2021-01-061-5/+8
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in SemihostFsPierre Gondois2021-01-061-4/+6
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in TimerDxePierre Gondois2021-01-061-1/+2
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in CpuDxePierre Gondois2021-01-062-5/+5
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in ArmScmiDxePierre Gondois2021-01-062-5/+8
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5007 in CompilerIntrinsicsLibPierre Gondois2021-01-066-10/+26
| | | | | | | | | This patch fixes the following Ecc reported error: There should be no initialization of a variable as part of its declaration Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5005 in ArmExceptionLibPierre Gondois2021-01-061-2/+3
| | | | | | | | | This patch fixes the following Ecc reported error: The body of a function should be contained by open and close braces that must be in the first column Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 5005 in CpuDxePierre Gondois2021-01-061-3/+5
| | | | | | | | | This patch fixes the following Ecc reported error: The body of a function should be contained by open and close braces that must be in the first column Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3001 in SemihostFsPierre Gondois2021-01-061-2/+2
| | | | | | | | | This patch fixes the following Ecc reported error: Boolean values and variable type BOOLEAN should not use explicit comparisons to TRUE or FALSE Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in ArmDisassemblerLibPierre Gondois2021-01-061-1/+6
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in SemihostFsPierre Gondois2021-01-061-5/+6
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in CpuDxePierre Gondois2021-01-062-6/+6
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in MmCommunicationDxePierre Gondois2021-01-061-2/+2
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in TimerDxePierre Gondois2021-01-061-2/+2
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in ArmMmuLibPierre Gondois2021-01-062-16/+16
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in OpteeLibPierre Gondois2021-01-061-3/+4
| | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Fix Ecc error 3002 in CompilerIntrinsicsLibPierre Gondois2021-01-066-7/+19
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Brackets are also added to comply to with the coding standard. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: Format header to fix Ecc crash in ArmMmuLibPierre Gondois2021-01-061-7/+7
| | | | | | | | | | | | | | The header of the file is not formatted properly, making the Ecc tool crash when running on the ArmPkg. The following command was run: ./BaseTools/BinWrappers/PosixLike/Ecc -c BaseTools/Source/Python/Ecc/config.ini -e BaseTools/Source/Python/Ecc/exception.xml -t ArmPkg -r ArmPkgEcc.xls Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmGicV3Dxe: Use ArmGicSetInterruptPriority() to set priorityQuan Nguyen2020-12-181-8/+5
| | | | | | | | | | | When Affinity Routing enabled, the GICR_IPRIORITYR<n> is used to set priority for SGIs and PPIs instead of GICD_IPRIORITYR<n>. This patch calls ArmGicSetInterruptPriority() helper function when setting priority to handle the difference. Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmGicLib: Add ArmGicSetInterruptPriority() helper functionQuan Nguyen2020-12-182-0/+53
| | | | | | | | | | | | | | | | According to ARM IHI 0069F, section 11.9.18 GICD_IPRIORITYR<n>, Interrupt Priority Registers, n = 0 - 254, when affinity routing is enabled for the Security state of an interrupt, GICR_IPRIORITYR<n> is used instead of GICD_IPRIORITYR<n> where n = 0 to 7 (that is, for SGIs and PPIs). As setting interrupt priority for SGIs and PPIs are handled using difference registers depends on the mode, this patch instroduces ArmGicSetInterruptPriority() helper function to handle the discrepancy. Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmLib: move ArmReadIdPfr0/1 into private header ArmV7Lib.hLeif Lindholm2020-12-182-12/+12
| | | | | | | | | | | ArmReadIdPfr0 () and ArmReadIdPfr1 () are now used only inside ArmLib. Remove the prototypes from the public header to discourage new id register accessor additions, and direct id register access in general. Move them into local header Arm/ArmV7Lib.h. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmLib: rename AArch64 variant of ArmReadIdPfr0Leif Lindholm2020-12-183-3/+10
| | | | | | | | | | ArmReadIdPfr0 is now used only inside ArmLib. Rename the AArch64 variant ArmReadIdAA64Pfr0 and add a declaration of that only into local header AArch64/AArch64Lib.h. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmLib: delete AArch64 version of ArmReadIdPfr1Leif Lindholm2020-12-181-8/+0
| | | | | | | | | The AArch64 version of ArmReadIdPfr1 is not used by any code in tree, or in edk2-platforms. Delete it. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: use helper to check for Security extensions in ArmArchTimerLibLeif Lindholm2020-12-181-1/+1
| | | | | | | | | Use the helper ArmHasSecurityExtensions () instead of accessing ID_PFR1 directly. Only affects ARM build. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: add ArmHasSecurityExtensions () helper functionLeif Lindholm2020-12-182-0/+32
| | | | | | | | | | | | | Create a helper function to eliminate direct feature register reading. Returns BOOLEAN True if the CPU implements the Security extensions, otherwise returns BOOL False. This function is only implemented for ARM, not AArch64. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: remove duplicated ARM/AArch64 ArmGicArchSecLib sourcesLeif Lindholm2020-12-183-50/+2
| | | | | | | | | | | The ID register access was the only difference between them, so after switching to the ArmHasGicSystemRegisters () helper, there is no longer any need to have separate ARM/AArch64 source files for ArmGicArchSecLib, so unify them and drop the subdirectories. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: remove duplicated ARM/AArch64 ArmGicArchLib sourcesLeif Lindholm2020-12-183-65/+2
| | | | | | | | | | | The ID register access was the only difference between them, so after switching to the ArmHasGicSystemRegisters () helper, there is no longer any need to have separate ARM/AArch64 source files for ArmGicArchLib, so unify them and drop the subdirectories. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg: use ID register helper for ArmGicArch(Sec)LibLeif Lindholm2020-12-184-4/+4
| | | | | | | | Use ArmHasGicSystemRegisters () instead of direct ID register tests. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmLib: add ArmHasGicSystemRegisters () helper functionLeif Lindholm2020-12-183-0/+50
| | | | | | | | | | | | Create a helper function to eliminate direct feature register reading, which gets messy in code shared between ARM/AArch64. Returns BOOLEAN True if the CPU implements the GIC System Register Interface (any version), otherwise returns BOOL False. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
* ArmPkg/ArmDisassemblerLib: fix incorrect comparisonwenyi,xie via groups.io2020-12-081-2/+2
| | | | | | | | | | | As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3, so the comparison between shift and 0x12 will always be false. The right shift type of ASR is 0x2. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-17 21:29:29 +0000