summaryrefslogtreecommitdiffstats
path: root/ArmPlatformPkg
Commit message (Collapse)AuthorAgeFilesLines
* ArmPlatformPkg/PlatformIntelBdsLib: don't clobber ConSplitter handleArd Biesheuvel2017-03-031-10/+15
| | | | | | | | | | | | | | | | The InitializeConsolePipe() routine takes care to only set its output argument *Interface if it is not already set, to prevent overwriting the ConSplitter interface pointer that may have already been assigned. However, the associated OUT argument 'Handle' is clobbered by the subsequent unnecessary LocateDevicePath() invocation, which should similarly be made dependent on whether *Interface has been set already. Reported-by: "Lee, Terry Ping-Chung" <terry.lee@hpe.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmPlatformStackLib: use callee preserved registersArd Biesheuvel2017-02-221-24/+19
| | | | | | | | | | | | | | | | | | The entry code in ArmPlatformStackSet () is a 1:1 transliteration of the ARM version, which uses the callee preserved registers r3 - r7 (*) to preserve the function arguments and the link register across a call to ArmPlatformIsPrimaryCore (). However, x3 - x7 are not callee preserved on AARCH64, and so we should use registers >= x19 instead. While we're at it, drop an unnecessary preserve of the link register, and simplify/deobfuscate the calculation of the secondary stack position. (*) Note that r3 is not actually a callee saved register even on ARM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PL061Gpio: fix the offset value in Get functionHaojian Zhuang2017-02-161-1/+1
| | | | | | | | | When call PL061GetPins() or PL061SetPins(), should use GPIO_PIN_MASK(offset) as parameter, not offset. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/PL061: remove duplicated PL061_GPIO_DATA_REGHaojian Zhuang2017-02-161-4/+4
| | | | | | | | | | PL061_GPIO_DATA_REG offset is referenced in PL061EffectiveAddress () already. So remove the duplicated reference when invoke PL061GetPins () or PL061SetPins (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/TZASC: Allow specifying subregions to be disabledBhupesh Sharma2017-01-263-11/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM TZASC-380 IP provides a mechanism to split memory regions being protected via it into eight equal-sized sub-regions. A bit-setting allows the corresponding subregion to be disabled. Several NXP/FSL SoCs support the TZASC-380 IP block and allow the DDR connected via the TZASC to be partitioned into regions having different security settings and also allow subregions to be disabled. This patch enables this support and can be used for SoCs which support such a partition of DDR regions. Details of the 'subregion_disable' register can be viewed here: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0431c/CHDIGDCI.html Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@nxp.com> [bhupesh.linux@gmail.com : Added gmail ID as NXP one is no longer valid] Signed-off-by: Bhupesh Sharma <bhupesh.linux@gmail.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe: Fixed crash on Juno R0Daniil Egranov2017-01-251-2/+9
| | | | | | | | | | The Marvell Yukon MAC address load supported only on Juno R1 and R2. It disabled for Juno R0 due to PCI issues on this board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: Change Flash memory attributes before writesAchin Gupta2017-01-201-22/+23
| | | | | | | | | | | | | | | In NorFlashFvbInitialize() if a valid Firmware Volume header is not found at the start of NOR Flash, the Flash memory is written before it has been remapped with EFI_MEMORY_UC attributes to allow write commands. Since the flash memory was previously mapped with Normal and possibly cacheable memory attributes, the Flash commands might never reach the device. This patch fixes this issue by remapping the Flash memory region with correct memory attributes before writing to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg: Use EfiEventGroupSignal from UefiLibStar Zeng2017-01-203-36/+6
| | | | | | | | | | | | | | | Use EfiEventGroupSignal from UefiLib and remove EmptyCallbackFunction. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=298 Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/ArmJunoDxe: Set Marvell Yukon MAC addressDaniil Egranov2017-01-102-0/+302
| | | | | | | | | The patch reads a valid MAC address from the Juno IOFPGA registers and pushes it into onboard Marvell Yukon NIC. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix VE RTSM mem map descriptor countSami Mujawar2016-11-251-2/+3
| | | | | | | | | | | | | | | The number of memory map entries used exceeded the allocated count, thereby causing memory corruption. Fixed the number of Virtual Memory Map Descriptors allocated in describing the RTSM Memory Map. Also added an assert to confirm that the descriptor count has not been exceeded, in the hope that it may help highlight the problem should a new entry be added. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg: Reformat VE Memory Map codeEvan Lloyd2016-11-251-54/+45
| | | | | | | | | | | | | | | This change is purely cosmetic, with no functional impact, and only exists to isolate cosmetic changes from a functional fix. Some indentation is adjusted. Overlength lines are re-flowed. alignment on = is adjusted as some lines exceeded 80 columns. if statement converted to conditional assignment. Redundant re-calculation of CacheAttributes removed. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/PL180MciDxe: update for identifying SDHaojian Zhuang2016-11-241-7/+22
| | | | | | | | | | | When CMD6 & ACMD51 are added into identifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it will hang when system tries to read expected data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/ArmVExpressFastBootDxe: eliminate deprecated string functionsArd Biesheuvel2016-10-281-4/+5
| | | | | | | | | | Get rid of functions that are no longer available when defining DISABLE_NEW_DEPRECATED_INTERFACES Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmVExpressFastBootDxe: clean up code and commentsArd Biesheuvel2016-10-281-5/+74
| | | | | | | | | | | | | | This module contains an implementation of the Android Fastboot Platform protocol. So follow common Tianocore practice, and duplicate the per-method comment blocks from the interface definition into the implementation. In addition, let's make all methods and the procotol struct STATIC, given that they are never referenced via external linkage. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com>
* ArmPlatformPkg/PrePi RVCT: use relative reference to mSystemMemoryEndArd Biesheuvel2016-10-281-1/+1
| | | | | | | | | | Bring the RVCT version of the PrePi entry point code in line with the GCC version, by using a relative rather than an absolute reference to the mSystemMemoryEnd variable. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/BootMonFs: eliminate deprecated string functionsArd Biesheuvel2016-10-283-14/+16
| | | | | | | | | | Get rid of functions that are no longer available when defining DISABLE_NEW_DEPRECATED_INTERFACES Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove ARM BDSArd Biesheuvel2016-10-268-4129/+0
| | | | | | | | | | | This is no longer used, and does not belong in a reference code base, so remove it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/NorFlashDxe: eliminate void pointer arithmeticArd Biesheuvel2016-10-241-1/+1
| | | | | | | | | | | | | | | | | | While most compilers happily allow arithmetic on void pointer, the RVCT compiler does not, and throws the following warning for NorFlashDxe: ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c(894,48) : error #1254-D: arithmetic on pointer to void or function type Since the expression in question involves a cast from UINTN to VOID*, simply add some parentheses to eliminate this warning. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PrePi: avoid global variable write to mSystemMemoryEndArd Biesheuvel2016-10-244-44/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | The global variable mSystemMemoryEnd is initialized by PrePi only if it has not been initialized by ArmPlatformPeiBootAction(). This allows platforms executing under, e.g., ARM Trusted Firmware to dynamically reserve a window at the top of memory that will be used by the secure firmware. However, PrePi is a SEC module, and writing to a global variable violates the SEC constraints, since SEC and PEI may execute from NOR flash. So instead, initialize mSystemMemoryEnd statically. This will ensure it holds the correct value for all implementations where the value is not overridden, but still allows it to be overridden during the call to ArmPlatformPeiBootAction(). Note that this patch also fixes a latent bug on 32-bit platforms where a value of mSystemMemoryEnd exceeding 4 GB would be truncated to 32-bits rather than limited to (4 GB - 1) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmVExpressPkg: add missing '0x' prefix to hex valueSudeep Holla2016-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | Interestingly the build used to succeed even with missing leading '0x' prefix for a hex value before the commit 0613ccbd1357 ("CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit") With the above commit, luckily we get ... raise BadExpression(ERR_ARRAY_ELE % self._Token) BadExpression: This must be HEX value for NList or Array: [e6]. This patch fixes the above error by adding the missing '0x' prefix to the hex value. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmShellCmdRunAxf: Reference MdePkg protocol definitionRuiyu Ni2016-10-191-4/+2
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe: Fix for PCI Dual Address ↵Daniil Egranov2016-10-121-3/+6
| | | | | | | | | | | | Cycle The fix handles the PCI Dual Address Cycle Attribute case. It allows drivers using PCI DAC run on Juno. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Remove UINTN cast when setting BaudRate.Alexei2016-10-111-1/+1
| | | | | | | | | | | | | | | SerialPortInitialize() set the BaudRate variable (type UINT64) as: BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate); This commit fixes a potential problem on ARM 32-bit builds, where the UINTN type is defined as UINT32, by removing the cast: BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate); Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Correct mendacious comments.Alexei2016-10-113-16/+11
| | | | | | | | | | | Correct some obviously incorrect comments that have invalid details for the returned values. (Copy /Paste problem?) There are no functional changes in this commit. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix PL011 FIFO size testEvan Lloyd2016-10-111-5/+6
| | | | | | | | | | | | | This change updates PL011UartInitializePort to compare ReceiveFifoDepth with the correct hardware FIFO size instead of the constant 32 used previously. This corrects a minor bug where a request for a fifo size > 15 and < 32 would not have been honoured on a system with a 16 byte FIFO. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: use strictly aligned CopyMem()Ard Biesheuvel2016-09-091-2/+61
| | | | | | | | | | | | | | | | | | | The UEFI spec stipulates that unaligned accesses should be enabled on CPUs that support them, which means all of them, given that we no longer support pre-v7 ARM cores, and the AARCH64 bindings mandate support for unaligned accesses unconditionally. This means that one should not assume that CopyMem () is safe to call on regions that may be mapped using device attributes, which is the case for the NOR flash. Since we have no control over the mappings when running under the OS, and given that write accesses require device mappings, we should not call CopyMem () in the read path either, but use our own implementation that is guaranteed to take alignment into account. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: remove EFI_MEMORY_UC attribute from normal memoryArd Biesheuvel2016-09-083-3/+0
| | | | | | | | | | | | | | | | On ARM systems, mapping normal memory as device memory may have unintended side effects, given that unaligned accesses or loads and stores with special semantics (e.g., load/store exclusive) may fault or may not work as expected. Similarly, DC ZVA instructions are only supported on normal memory, not device memory. So remove the EFI_MEMORY_UC attribute that we set by default on system RAM. If any region requires this attribute, it is up to the driver to set this attribute, and to ensure that no offending operations are performed on it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-upDennis Chen2016-09-084-15/+15
| | | | | | | | | | | According to the ACPI 6.0/6.1 spec, the physical base address of GICC, GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC base address PCDs to 64-bit, and fix up all users. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Dennis Chen <dennis.chen@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPlatformPkg/PrePi: fix secondary stack baseMichael Zimmermann2016-09-071-1/+1
| | | | | | | | | this bug was introduced by: d2fa09a ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macroArd Biesheuvel2016-08-112-48/+12
| | | | | | | | | | | | | Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, replace some inefficient uses of LoadConstantToReg(), and remove the workaround that was added to allow conditional branches to functions with external linkage. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macroArd Biesheuvel2016-08-112-42/+14
| | | | | | | | | | | Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, replace some inefficient uses of LoadConstantToReg() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macroArd Biesheuvel2016-08-115-111/+41
| | | | | | | | | | | Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, replace some inefficient uses of LoadConstantToReg() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macroArd Biesheuvel2016-08-115-71/+18
| | | | | | | | | | | Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, replace some inefficient uses of LoadConstantToReg() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macroArd Biesheuvel2016-08-112-70/+29
| | | | | | | | | | | Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, replace some inefficient uses of LoadConstantToReg() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macroArd Biesheuvel2016-08-112-52/+21
| | | | | | | | | | | Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, replace some inefficient uses of LoadConstantToReg() Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg RVCT: drop dependency on GCC macro libraryArd Biesheuvel2016-08-119-66/+29
| | | | | | | | | | | The RVCT .asm files include AsmMacroIoLib.h only for the definition of LoadConstantToReg (), which makes it tedious to make change to that file without the risk of making the RVCT assembler unhappy. So simply replace LoadConstantToReg() with mov32, which does the right thing in all cases. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: change PcdBdsLinuxSupport default valueDaniil Egranov2016-08-041-1/+1
| | | | | | | | | | | | The built-in Linux Loader is obsolete and not included in most builds. The patch sets the PcdBdsLinuxSupport default value to FALSE and prevents ArmBds from looking for built-in Linux Loader by default and ASSERTing when it cannot be found. Platforms which still using built-in loader have to set this PCD in their platform description file. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Convert ArmJunoDxe to use common juno revision codeJeremy Linton2016-07-281-43/+19
| | | | | | | | | Now that the code to detect the Juno revision is in the header go ahead and covert the ArmJunoDxe to use it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: break out juno revision detectionJeremy Linton2016-07-281-2/+27
| | | | | | | | | | The code to detect what juno revision we are running on is fairly small put it in a common header where it may be used in a couple places. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJuno: Correct AXI->PCIe translation commentsJeremy Linton2016-07-141-2/+2
| | | | | | | | | | | | | | | The AXI<->PCIe translation comments are out of date with respect to the code. In the first case the AXI master port is incorrectly called a slave. In the second case the the translation direction indicated for the slave port is the wrong direction. Correct both of these comments to reflect what the code is doing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmJuno: fix Juno PIO host bridge mappingJeremy Linton2016-07-141-3/+6
| | | | | | | | | | | The Juno PIO mapping is 8M, so it should be using a 32-bit PIO address translation. Further, PIO addresses should start at 0 and be translated to/from the ARM MMIO region. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Set Juno debug serial port defaultsEvan Lloyd2016-07-073-3/+53
| | | | | | | | | | | | | | | | | | | | | | | | | Juno has several serial ports, one of which may be used for a remote debug interface (e.g. gdb, WinDbg). The debug serial port needs to be distinct from that used for UEFI trace to prevent corruption of debugger protocol messaging. The UEFI spec requires that serial devices be initialised to default settings. (11.8 Serial I/O Protocol - "The default attributes for all UART-style serial device interfaces are: 115,200 baud, ..." and 17.3.3 EFI Debugport Variable - "These defaults must be used in the absence of a DEBUGPORT variable...") This change adds initialization of the serial device reported in the ACPI DBG2 table. The initialisation is done early in the boot to allow the possibility of remote debug of UEFI itself. NOTE: This is functionally dependent on the DBG2 table being updated in OpenPlatformPkg, but is required as a precursor to that change. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg ArmVirtPkg MdeModulePkg: switch to separate ArmMmuLibArd Biesheuvel2016-07-072-1/+2
| | | | | | | | | | | | Switch all users of ArmLib that depend on the MMU routines to the new, separate ArmMmuLib. This needs to occur in one go, since the MMU routines are removed from ArmLib build at the same time, to prevent conflicting symbols. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* ArmPlatformPkg/NorFlashAuthenticatedDxe: remove this obsolete moduleArd Biesheuvel2016-06-221-77/+0
| | | | | | | | | | This module is now identical in functionality to NorFlashDxe, and is no longer used, so remove it altogether. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/NorFlashDxe: accept both non-secure and secure varstore GUIDsArd Biesheuvel2016-06-226-44/+5
| | | | | | | | | | | | | | | | | | | Now that the generic Variable Runtime DXE code no longer distinguishes between gEfiVariableGuid and gEfiAuthenticatedVariableGuid in the varstore FV header, we can relax the check in the NOR flash driver to accept either GUID regardless of whether we are running a secure boot capable build or not. This also means we can always use gEfiAuthenticatedVariableGuid when we encounter an empty NOR flash that needs to be initialized before use. So remove the mNorFlashVariableGuid global from the shared code and from both versions of NorFlashDxe.inf. This essentially collapses the two drivers into a single one, which means we can remove NorFlashAuthenticatedDxe entirely in a subsequent patch. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: Fix PL011 Glitches.Evan Lloyd2016-06-151-0/+22
| | | | | | | | | | | | | | | | | | | | | | This change corrects 3 problems in the PL011 driver. 1. The TRM states "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must not be changed:...when the UART is enabled" 2. The TRM (3.3.8) describes logic requiring the UART to be disabled and flushed before adjusting UARTCR. 3. Several redundant calls get made to PL011UartInitializePort, where the characteristics do not change, but updating the registers can cause glitches in the output stream. The parameters are compared to the current state and no action taken if no change of state is required. Where an update is required, the specified logic is followed, and the register updates only made when the UART is disabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Add support to configure PL011 UART clockEvan Lloyd2016-06-155-28/+46
| | | | | | | | | | | | | | | | | | | | | | | On some platforms the UART clock is not the same for all the serial ports. The PL011 driver must be capable of handling serial ports with different clock rates, so must not rely on a PCD for the clock rate. This patch allows the UART clock rate to be passed as a parameter to PL011UartInitializePort(), which is called from the serial port library. This patch also contains the corresponding changes in the serial port library. The PCD in Drivers/PL011Uart is replaced by an extra parameter for PL011UartInitializePort. The PCD is moved to Library/PL011SerialPortLib to supply the value to pass. A corresponding patch to ArmVirtPkg is included in the same bundle to align that with these changes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Remove double write in PL011Evan Lloyd2016-06-151-4/+3
| | | | | | | | | | | | The variable LineControl was initialised to zero, then updated in a condition. This change converts that to a write in each branch of the condition, removing the Write/Read/Modify/Write sequence. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Update PL011 Serial PCDs to Fixed PCDsEvan Lloyd2016-06-154-20/+20
| | | | | | | | | | | | The PCDs used in the PL011 UART Driver and Serial Port Library are inherently "fixed at build". This change updates the source to use Fixed PCDs for these values. This improves clarity and efficiency. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* ArmPlatformPkg: Tidy PL011 UART driverEvan Lloyd2016-06-153-107/+184
| | | | | | | | | | | | | | | | | This cosmetic change only tidies things up in preparation for actual updates. (This reflects responses to a previously submitted patch, which has been split into several discrete changes.) There are no functional changes in this commit. Changes comprise: Minor corrections to comment typos. Minor formatting mods. Expansion of function comments. Remove OUT from UartBase parameter. Addition of #define for "magic mumbers". Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>