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* MdeModulePkg/NvmExpressDxe: Fix wrong queue size for async IO queuesSean Brogan2019-11-201-2/+4
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2118 When a packet is queued/completed for the asynchronous IO queue, the logic to roll over to the front of the queue doesn't account for actual size of the IO Submission/Completion queue. This causes a device to hang due to doorbell being outside of visible queue. An example would be if an NVMe drive only supported a queue size of 128 while the driver supports 256. Cc: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Acked-by: Ray Ni <ray.ni@intel.com>
* MdeModulePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-091-7/+1
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/NvmExpressDxe: Refine PassThru IO queue creation behaviorHao Wu2018-10-251-8/+17
| | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1260 For the PassThru() service of NVM Express Pass Through Protocol, the current implementation (function NvmExpressPassThru()) will only use the IO Completion/Submission queues created internally by this driver during the controller initialization process. Any other IO queues created will not be consumed. So the value is little to accept external IO Completion/Submission queue creation request. This commit will refine the behavior of function NvmExpressPassThru(), it will only accept driver internal IO queue creation commands and will return "EFI_UNSUPPORTED" for external ones. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/NvmExpressDxe: Always copy CQ entry to PassThru packetHao Wu2018-10-251-5/+4
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1259 According to the the NVM Express spec Revision 1.1, for some commands, command-related information will be stored in the Dword 0 of the completion queue entry. One case is for the Get Features Command (Section 5.9.2 of the spec), Dword 0 of the completion queue entry may contain feature information. Hence, this commit will always copy the content of completion queue entry to the PassThru packet regardless of the execution result of the command. Cc: Liangcheng Tang <liangcheng.tang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/NvmExpressDxe: Refine data buffer & len check in PassThruHao Wu2018-10-251-15/+18
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1142 According to the the NVM Express spec Revision 1.1, for some commands (like Get/Set Feature Command, Figure 89 & 90 of the spec), the Memory Buffer maybe optional although the command opcode indicates there is a data transfer between host & controller (Get/Set Feature Command, Figure 38 of the spec). Hence, this commit refine the checks for the 'TransferLength' and 'TransferBuffer' field of the EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET structure to address this issue. Cc: Liangcheng Tang <liangcheng.tang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg: Clean up source filesLiming Gao2018-06-281-1/+1
| | | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg NvmExpressDxe: return error code in error pathStar Zeng2018-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=937 In NvmeExpressPassthru.c near line 659: Prp = NvmeCreatePrpList ( PciIo, PhyAddr, EFI_SIZE_TO_PAGES(Offset + Bytes) - 1, &PrpListHost, &PrpListNo, &MapPrpList ); if (Prp == NULL) { goto EXIT; } Status is not set to an error code - Status is initialized to EFI_SUCCESS, or set by a PciIo->Map to EFI_SUCCESS above this code. This error path should set Status to an error code before goto EXIT. Change-Id: I8a5cdf981aa609534c205d3676395805ac60a003 Cc: Hao Wu <hao.a.wu@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg/NvmExpressDxe: Fix data buffer not mapped for Write cmdHao Wu2018-01-241-2/+3
| | | | | | | | | | | | | | | | | | | | | | | Within function NvmExpressPassThru(): The data buffer for the below 2 Admin command: Create I/O Completion Queue command (Opcode 01h) Create I/O Submission Queue command (Opcode 05h) are not mapped to the PCI controller specific addresses. But the current code logic also prevents the below NVM command: Write (Opcode 01h) from mapping its data buffer. Hence, this commit refine the logic to resolve this issue. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/NvmExpressDxe: fix error status overrideHeyi Guo2017-12-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f6b139b added return status handling to PciIo->Mem.Write. However, the second status handling will override EFI_DEVICE_ERROR returned in this branch: // // Check the NVMe cmd execution result // if (Status != EFI_TIMEOUT) { if ((Cq->Sct == 0) && (Cq->Sc == 0)) { Status = EFI_SUCCESS; } else { Status = EFI_DEVICE_ERROR; ^^^^^^^^^^^^^^^^ Since PciIo->Mem.Write will probably return SUCCESS, it causes NvmExpressPassThru to return SUCCESS even when DEVICE_ERROR occurs. Callers of NvmExpressPassThru will then continue executing which may cause further unexpected results, e.g. DiscoverAllNamespaces couldn't break out the loop. So we save previous status before calling PciIo->Mem.Write and restore the previous one if it already contains error. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/NvmExpressDxe: Handle timeout for blocking PassThru reqHao Wu2017-07-061-1/+133
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=433 When a blocking NVMe PassThru request experiences timeout, the current codes in function NvmExpressPassThru() do not abort the timeout request while advancing synchronous Submission Queue tail. Therefore, it is possible to submit a new blocking PassThru request when the synchronous Submission Queue is full. The commit adds logic to abort the timeout request by resetting the NVMe controller when a timeout occurs for a blocking PassThru request. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/NvmExpressDxe: Handling return of write to sq and cq dbSuman Prakash2017-04-241-2/+6
| | | | | | | | | | | | | | | In case of an async command if updating the submission queue tail doorbell fails then the command will not be picked up by device and no completion response will be created. This scenario has to be handled. Also if we create an AsyncRequest element and insert in the async queue, it will never receive a completion so in the timer routine this element won't be freed, resulting in memory leak. Also in case of blocking calls we should capture the status of updating completion queue head doorbell register and return it to caller of PassThru. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Suman Prakash <suman.p@samsung.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg/NvmExpressDxe: Memory leak fix in async code flowSuman Prakash2017-03-211-0/+5
| | | | | | | | | | | | | | | | For async commands, the buffer allocated for Prp list is not getting freed, which will cause memory leak for async read write command. For example testing async command flow with custom application to send multiple read write commands were resulting in decrease of available memory page in memmap, which eventually resulted in system hang. Hence freeing AsyncRequest->MapData, AsyncRequest->MapMeta, AsyncRequest->MapPrpList and AsyncRequest->PrpListHost when async command is completed. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Suman Prakash <suman.p@samsung.com.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* MdeModulePkg NvmExpressDxe: Fix 'Event' won't be signaled for Admin cmdsHao Wu2016-09-061-2/+11
| | | | | | | | | | | This commit fixes the issue that the caller event passed to EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.PassThru() will not be signaled for NVME Admin commands. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Add NamespaceId validity check in PassThruHao Wu2016-09-061-0/+8
| | | | | | | | | | | | According to the UEFI spec, EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.PassThru() should return EFI_INVALID_PARAMETER if the input 'NamespaceId' is invalid for the NVM Express controller. This commit adds check in PassThru() to follow this rule. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Add check for command packet in PassThruHao Wu2016-09-061-2/+19
| | | | | | | | | | | | | | | | | | | | | | This commit adds serveral checks for the 'Packet' parameter passed to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.PassThru() API: The check for the 'TransferLength' field in EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET to make sure the value will not exceed the maximum data transfer size allowed by a controller. The check for the 'TransferBuffer' and 'TransferLength' fields in EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET when the Opcode of an NVME command indicates a data transfer between controller and host. The check for the 'MetadataLength' field in EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET to make sure the value is not 0 when the corresponding 'MetadataBuffer' field has a non-NULL value. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Add check on the attributes of NVME controllerHao Wu2016-09-061-1/+13
| | | | | | | | | | | | | | According to UEFI spec, an EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL with neither EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL nor EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL set in the Attributes field is an illegal configuration. This commit adds this check in the PassThru API to follow the spec. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Add buffer alignment check in PassThru APIHao Wu2016-09-061-21/+34
| | | | | | | | | | | | | According to the UEFI spec, the 'TransferBuffer' and 'MetadataBuffer' used in a data transfer should be aligned on the boundary specified by the IoAlign field in the EFI_NVM_EXPRESS_PASS_THRU_MODE structure. This commit adds this check to follow the spec. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Refine GetNextNamespace API to follow specHao Wu2016-09-061-1/+5
| | | | | | | | | | | | | According to the UEFI spec, EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() should return EFI_NOT_FOUND when the value pointed to by NamespaceId is the namespace ID of the last namespace on the NVM Express controller. This commit modifies the check for NamespaceId to follow this rule. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Refine GetNameSpace API to follow specHao Wu2016-09-061-1/+11
| | | | | | | | | | | | | | | According to the UEFI spec, EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamespace() should return EFI_NOT_FOUND when the input DevicePath is a device path node type that the NVM Express Pass Thru driver supports, but there is not a valid translation from DevicePath to a namespace ID. Current code will return EFI_SUCCESS. This commit adds additional check in the GetNameSpace API to make sure correct status is returned. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Refine BuildDevicePath API to follow specHao Wu2016-09-061-5/+9
| | | | | | | | | | | | | According to the UEFI spec, EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() should return EFI_NOT_FOUND when the input NamespaceId is not valid. However, current code returns EFI_DEVICE_ERROR instead. This commit modifies the check for input NamespaceId to return the correct status. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg NvmExpressDxe: Add BlockIo2 supportHao Wu2016-05-191-13/+59
| | | | | | | | | | | | | | | Together with EFI_BLOCK_IO_PROTOCOL, EFI_BLOCK_IO2_PROTOCOL is also produced on NVMe devices. The following Block I/O 2 functions are implemented: Reset ReadBlocksEx WriteBlocksEx FlushBlocksEx Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* MdeModulePkg/NvmExpressDxe: Add SecurityStorageProtocol supportTian Feng2015-06-161-13/+23
| | | | | | | | | | Produce this protocol for each namespace at NVMe controller. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tian Feng <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17638 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/NvmExpressDxe: Expose EFI_NVM_EXPRESS_PASS_THRU protocolFeng Tian2015-05-041-118/+125
| | | | | | | | | | | | This patch produces a EFI_NVM_EXPRESS_PASS_THRU protocol instance on device handle to provide upper user a way to send cmd to NVMe device. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17286 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/NvmExpressDxe: fix build errorFeng Tian2015-04-271-1/+1
| | | | | | | | | Add missing parentheses due to typo. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17209 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/NvmExpressDxe: Correct Prp list creation algorithm.Feng Tian2015-04-271-5/+11
| | | | | | | | | | The number of the Prp lists and the number of the entries in last Prp list may be calculated wrongly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Baban Devkate <baban.devkate@seagate.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17208 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg: Source fixes and cleanup for ARMGCC compilesRandy Pawell2014-12-041-3/+1
| | | | | | | | | | | | | | | | - Fix EFI_IPv4_ADDRESS usages to use a macro to copy the structure instead of direct assignment, to avoid runtime alignment errors. - Fix a EFI_INPUT_KEY usage in TerminalDxe to use CopyMem() to copy the structure instead of direct assignment, to avoid runtime alignment error. - Delete excess local variables that are initialized but otherwise unused. - CompilerIntrinsicsLib library now imported for AARCH64, as well as ARM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Randy Pawell <randy_pawell@hp.com> Reviewed-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16471 6f19259b-4bc3-4df7-8a09-765794883524
* MdeModulePkg/NvmExpressDxe: Fix some bugsFeng Tian2013-09-111-5/+7
| | | | | | | | | | | | | | 1) The Queue size field in create I/O submission/completion queue cmds is 0-based. the current code is 1-based. 2) a typo on allocated memory page size. it's inconsistent that some places is using 4 pages, but a place is using 6 pages. 3) a typo on PRP/SGL mechanism judgment. should directly use Psdt field rather than Opc field. 4) some platforms may not support UINT64 width access on MMIO register. Fix it to use two 32-bit width access. Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Kinney Michael <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14657 6f19259b-4bc3-4df7-8a09-765794883524
* MdeMdeModulePkg/NvmExpressDxe: Add NVM Express support.Feng Tian2013-08-121-0/+884
Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14545 6f19259b-4bc3-4df7-8a09-765794883524
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