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* MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".Wang, Sanyo2020-10-101-1/+3
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352 SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5) Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sanyo Wang <sanyo.wang@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
* MdePkg: Correct EFI_BLOCK_IO_PROTOCOL_REVISION3 valueMichael Kubacki2020-09-181-1/+1
| | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2961 The value of EFI_BLOCK_IO_PROTOCOL_REVISION3 is currently 0x00020031. However, the value assigned in the UEFI Specification 2.8B is ((2<<16) | (31)) which is 0x0002001F. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: PciExpressLib support variable size MMCONFMarcello Sylvester Bauer2020-09-161-2/+3
| | | | | | | | | | | | | Add support for arbitrary sized MMCONF by introducing a new PCD. Add a return value to point out invalid PCI addresses. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Cc: Patrick Rudolph <patrick.rudolph@9elements.com> Cc: Christian Walter <christian.walter@9elements.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Correcting EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT definitionPaul2020-08-301-1/+1
| | | | | | | | | | | | | In Acpi10.h, EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT is defined as 0x10, but should be 0x02 per the ACPI Specification. REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2937 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Paul G <paul.grimes@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg/Include: Add missing definition of SMBIOS type 42h in SmBios.hAbner Chang2020-08-251-0/+9
| | | | | | | | | Add host interface Protocol Type Data Format structure in SmBios.h BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2328 Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Fix spelling mistake for occurredMichael D Kinney2020-08-191-1/+1
| | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2361 Cc: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseLib: Add support for the VMGEXIT instructionTom Lendacky2020-08-161-0/+14
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 VMGEXIT is a new instruction used for Hypervisor/Guest communication when running as an SEV-ES guest. A VMGEXIT will cause an automatic exit (AE) to occur, resulting in a #VMEXIT with an exit code value of 0x403. Since SEV-ES is only supported in X64, provide the necessary X64 support to execute the VMGEXIT instruction, which is coded as "rep vmmcall". For IA32, since "vmmcall" is not supported in NASM 32-bit mode and VMGEXIT should never be called, provide a stub implementation that is identical to CpuBreakpoint(). Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg/BaseLib: Add support for the XGETBV instructionTom Lendacky2020-08-161-0/+17
| | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a CPUID instruction requires the current value of the XCR0 register. In order to retrieve that value, the XGETBV instruction needs to be executed. Provide the necessary support to execute the XGETBV instruction. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg: Add a structure definition for the GHCBTom Lendacky2020-08-161-0/+166
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 The GHCB is used by an SEV-ES guest for communicating between the guest and the hypervisor. Create the GHCB definition as defined by the GHCB protocol definition. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg: Add the MSR definition for the GHCB registerTom Lendacky2020-08-161-0/+46
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 For SEV-ES, the GHCB page address is stored in the GHCB MSR register (0xc0010130). Define the register and the format used for register during GHCB protocol negotiation. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg Base.h: Delete prototype for __builtin_return_addressJessica Clarke2020-07-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1004 Being a compiler builtin, the type of __builtin_return_address is already known to the compiler so no prototype is needed. Clang also errors out when redeclaring certain builtins like this[1], though currently only for ones with custom type checking. At the moment, __builtin_return_address does not use custom type checking and so does not trigger this error, however, the CHERI fork of LLVM, which will form the basis of the toolchain for Arm's experimental Morello platform, does use custom type checking for it, and so gives an error. Thus, simply delete the unnecessary line. [1] llvm/llvm-project@41af97137572ad6d4dafc872e7ecf6bbb08d4984 Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* MdePkg/Include/IndustryStandard: Main CXL headerJaveed, Ashraf2020-07-271-0/+22
| | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611 Introducing the Cxl.h as the main header file to support all versions of Compute Express Link Specification register definitions. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Include/IndustryStandard: CXL 1.1 RegistersJaveed, Ashraf2020-07-272-4/+571
| | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611 Register definitions from chapter 7 of Compute Express Link Specification Revision 1.1 are ported into the new Cxl11.h. The CXL Flex Bus registers are based on the PCIe Extended Capability DVSEC structure header, led to the inclusion of upgraded Pci.h. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Add New Memory AttributesOleksiy Yakovlev2020-07-151-2/+8
| | | | | | | | | | | | | | | Add usage of EFI_MEMORY_SP and EFI_MEMORY_CPU_CRYPTO attributes introduced in UEFI 2.8 (UEFI 2.8, mantis 1919 and 1872) Fix typos in EFI_MEMORY_CPU_CRYPTO description. Add attributes bitmasks, grouped by type. Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Message-Id: <20200702205039.52400-2-oleksiyy@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg/Include: Add UT_EXPECT_ASSERT_FAILURE() to UnitTestLibMichael D Kinney2020-07-151-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2801 Add the UT_EXPECT_ASSERT_FAILURE(FunctionCall, Status) macro to the UnitTestLib that can be used to check if a function under test triggers an ASSERT() condition. If an ASSERT() condition is triggered, then the macro returns. If the ASSERT() condition is not triggered, then the current unit test fails with a status of UNIT_TEST_ERROR_TEST_FAILED. If ASSERT()s are disabled, then this check for ASSERT() behavior is not possible, and the check is skipped. The global variable gUnitTestExpectAssertFailureJumpBuffer is added to the UnitTestLib to save/restore context when the UT_EXPECT_ASSERT_FAILURE(FunctionCall, Status) macro is used. The UT_EXPECT_ASSERT_FAILURE() macro uses the SetJump() service with this global variable. The UnitTestLib service UnitTestDebugAssert() uses the LongJump() service with this global to restore context if an ASSERT() is triggered by the code under test. Add UnitTestExpectAssertFailure() to the UnitTestLib class. The UnitTestExpectAssertFailure() is called from the new UT_EXPECT_ASSERT_FAILURE() macro after the status of this macro check is known. Add UnitTestDebugAssert() to the UnitTestLib class. The UnitTestDebugAssert() service is the same as the DebugLib DebugAssert() service and is invoked from the DebugLib _ASSERT() macro if unit testing is enabled. This allows the Unit Test Framework to know when code under test triggers an ASSERT() condition. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/Include: Hook DebugLib _ASSERT() for unit testsMichael D Kinney2020-07-151-1/+27
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2801 Update DebugLib.h _ASSERT() macro to check if unit testing is enabled and call UnitTestDebugAssert() instead of DebugAssert() so the an ASSERT() condition that is triggered by a function under test can be handled by the Unit Test Framework. If EDKII_UNIT_TEST_FRAMEWORK_ENABLED is not defined, then the existing DebugLib behavior is preserved. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add Serial Terminal Device Type GuidOleksiy Yakovlev2020-07-031-0/+6
| | | | | | | | | | Add definition of EFI_SERIAL_TERMINAL_DEVICE_TYPE_GUID. It was miseed in "Extend SERIAL_IO with DeviceTypeGuid" patch. (UEFI 2.8, mantis 1832) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/PciSegmentInfoLib: Add missing EFIAPI to GetPciSegmentInfo()Ray Ni2020-06-241-1/+2
| | | | | | | | | | | | All public APIs should have EFIAPI modifier. Somehow PciSegmentInfoLib missed the EFIAPI modifier. The patch updates the library header file and NULL instance in MdePkg to add the missing EFIAPI. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Include Acpi header fileWasim Khan2020-06-191-0/+2
| | | | | | | | | | ACPI memory mapped configuration space access (MCFG) table requires defination of EFI_ACPI_DESCRIPTION_HEADER. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/UnitTestLib.h: Drop FrameworkHandle param from SaveFrameworkState()Michael Kubacki2020-06-141-6/+3
| | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2612 The framework handle can be retrieved from GetActiveFrameworkHandle() internal to SaveFrameworkState() so this change removes the parameter from the function signature. Cc: Bret Barkelew <brbarkel@microsoft.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Fix SafeString performing assertions on runtime checksVitaly Cheptsov2020-05-221-111/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2054 Runtime checks returned via status return code should not work as assertions to permit parsing not trusted data with SafeString interfaces. Replace ASSERT() with a DEBUG_VERBOSE message. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Brian J. Johnson <brian.johnson@hpe.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Vincent Zimmer <vincent.zimmer@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Vitaly Cheptsov <vit9696@protonmail.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: add definitions for ACPI NVDIMM Device PathLiu, Zhiguang2020-05-211-0/+15
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2716 Add definitions for ACPI NVDIMM Device Path following UEFI spec. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: James Anandraj <james.sushanth.anandraj@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add FMP Capsule Image Header extensionOleksiy Yakovlev2020-05-201-1/+10
| | | | | | | | | Add bitmask to structure which gives a binary-inspectable mechanism to determine if a capsule contains an authentication section or depex section. (UEFI 2.8 errata a, mantis 2026) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add EFI_RT_PROPERTIES_TABLELiming Gao2020-05-201-0/+69
| | | | | | | | | | Define Guid & data structure for EFI_RT_PROPERTIES_TABLE, designed to be published by a platform if it no longer supports all EFI runtime services once ExitBootServices() has been called by the OS. (UEFI 2.8 errata a, mantis 2049) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Fix OUT parameters marked as IN OUTOleksiy Yakovlev2020-05-209-17/+17
| | | | | | | | | | | | | | | | | | | | Some OUT parameters in the specification were mistakenly marked as IN OUT. "IN OUT" replaced with "OUT" in the following interfaces EFI_BOOT_SERVICES.GetMemoryMap():MemoryMap EFI_BOOT_SERVICES.LocateHandleBuffer():NoHandles EFI_SIMPLE_POINTER_PROTOCOL.GetState():State EFI_ABSOLUTE_POINTER_PROTOCOL.GetState():State EFI_EDID_OVERRIDE_PROTOCOL.GetEdid():EdidSize and Edid EFI_ATA_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_SD_MMC_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_EXT_SCSI_PASS_THRU_PROTOCOL.BuildDevicePath():DevicePath EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImage():Image (UEFI 2.8 errata a, mantis 2035) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Add new CPER Notification typesOleksiy Yakovlev2020-05-201-0/+15
| | | | | | | | Add SEA, SEI, and PEI CPER Notification types defined in UEFI 2.8 errata a. (UEFI 2.8 errata a, mantis 2026) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Update structures for MpServices ProtocolRobert Phelps2020-05-151-0/+50
| | | | | | | | | | Added EXTENDED_PROCESSOR_INFORMATION structure and supporting structures and definitions. The intent is to support updated topology layout for CPUs. (PI 1.7a Mantis 2071) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Added header file for Delayed Dispatch PPIRobert Phelps2020-05-151-0/+85
| | | | | | | | | Created new header file for the new EFI_DELAYED_DISPATCH_PPI PPI (PI 1.7 Mantis 1891) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Updates to PI 1.7 Revision numbersRobert Phelps2020-05-152-4/+4
| | | | | | | | | Revision number defines and MACROs were incorrect for the current version of the Specification (PI 1.7 Mantis 1892) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: New Status CodesRobert Phelps2020-05-151-2/+15
| | | | | | | | | Updated PiStatusCodes to reflect changes to PI 1.7 Specification (PI 1.7 Mantis 1889) Signed-off-by: Robert Phelps <robert@ami.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: UEFI JSON Capsule SupportOleksiy Yakovlev2020-05-153-0/+128
| | | | | | | | | | Added Guids and structures, that defines the work flow to perform capsule update using JSON objects. (UEFI 2.8 mantis 1935) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Add UEFI Spec Revision 2.8Oleksiy Yakovlev2020-05-151-0/+1
| | | | | | | | | | Added entrie in the EFI_SYSTEM_TABLE related definitions section, to signify UEFI 2.8 spec revision. (UEFI 2.8 mantis 1926) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Bootable NVDIMM namespacesOleksiy Yakovlev2020-05-151-0/+12
| | | | | | | | | | | | Provided a mechanism for UEFI FW to identify and hand off bootable NVDIMM namespaces to the OS by standardizing the EFI device path. EFI device path for physical NVDIMM devices changed from an ACPI _ADR device to an ACPI NVDIMM device for correctness. (UEFI 2.8 mantis 1858) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: REST style formsetOleksiy Yakovlev2020-05-152-0/+5
| | | | | | | | | | New ClassGuid EFI_HII_REST_STYLE_FORMSET_GUID is defined. In question level, a new flag EFI_IFR_FLAG_REST_STYLE is defined. (UEFI 2.8 mantis 1853) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: Extend SERIAL_IO with DeviceTypeGuidOleksiy Yakovlev2020-05-151-0/+9
| | | | | | | | | | EFI_SERIAL_IO_PROTOCOL_REVISION incremented to 0x00010001. CONST EFI_GUID *DeviceTypeGuid field added to the protocol structure. UEFI 2.8 mantis 1832. Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: introduce MM communicate 2 protocolArd Biesheuvel2020-05-121-0/+69
| | | | | | | | | Add the protocol definition of the MM communicate 2 protocol, which has been introduced by version 1.7 errata A of the PI spec. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseLib: BaseLib for RISCV64 architectureAbner Chang2020-05-071-0/+26
| | | | | | | | | | | | | | | | Add RISC-V RV64 BaseLib functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/Include: RISC-V definitions.Abner Chang2020-05-075-0/+89
| | | | | | | | | | | | | | | | Add RISC-V processor related definitions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg: Add RISC-V RISCV64 bindingAbner Chang2020-05-071-0/+173
| | | | | | | | | | | | | | | | Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
* MdePkg/Security2: Mark the File parameter as OPTIONAL.Guomin Jiang2020-04-221-1/+1
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2652 According to the description, the File is OPTIONAL and can be NULL. Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseLib: Add linked list iteration macrosMichael Kubacki2020-04-211-0/+27
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 The macros EFI_LIST_FOR_EACH and EFI_LIST_FOR_EACH_SAFE have been duplicated across several drivers. These macros have proven useful and established a commonly used pattern for linked list iteration. This change defines the macros in BaseLib.h alongside other generic linked list macros and functions. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdePkg: Add AML FieldList OpCode definitionsPierre Gondois2020-04-171-0/+8
| | | | | | | | | | | | | | | | | | | | | The ACPI specification, version 6.3, January 2019, defines the Named Objects Encoding for FieldElements in section '20.2.5.2 Named Objects Encoding'. FieldElements can be one of the following: NamedField | ReservedField | AccessField | ExtendedAccessField | ConnectField Some of these keywords are starting with an opcode, allowing to identify their type. E.g.: ReservedField := 0x00 PkgLength This patch adds these FieldElement opcodes definitions to the list of AML Opcode definitions. Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/UefiScsiLib: Set FUA bit for synchronous SCSI Write operationsZurcher, Christopher J2020-04-151-1/+7
| | | | | | | | | | | | | | The FUA (Force Unit Access) bit forces data to be written directly to disk instead of the write cache. This prevents data from being lost if a shutdown or reset is requested immediately after a SCSI write operation. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Christopher J Zurcher <christopher.j.zurcher@intel.com>
* MdePkg DebugLib: Enable FILE NAME as DEBUG ASSERT for CLANGZhiguang Liu2020-04-131-1/+5
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1548 For clang compiler, This change will make the generated image not include the absolute file path. If so, the generated debug image can be reproduced in the different root directory. Also, it will reduce the size of debug image size. To do so, use __FILE_NAME__ macro to replace __FILE__. __FILE_NAME__ is Clang-specific extension that functions similar to __FILE__ but only renders the last path component (the filename) instead of an invocation dependent full path to that file, and __FILE_NAME__ is introduced since clang 9. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg: remove PropertiesTable GUIDArd Biesheuvel2020-04-071-31/+0
| | | | | | | | | | | | | Remove the GUID definition that describes the deprecated properties table, which is no longer generated by the DXE core. Link: https://bugzilla.tianocore.org/show_bug.cgi?id=2633 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdePkg/Include: Add RISC-V related definitions EDK2 CI.Abner Chang2020-04-031-0/+7
| | | | | | | | | | | | | | | | HTTP/PXE boot RISC-V related definitions for EDK2 CI. BZ:2562: https://bugzilla.tianocore.org/show_bug.cgi?id=2562 Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
* MdePkg/PciExpress40.h: DVSEC definition missingJaveed, Ashraf2020-03-191-0/+28
| | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2598 All registers definition of DVSEC are defined as per the PCI Express Base Specification 4.0 chapter 7.9.6. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Remove FIT table industry standard header file.Siyuan Fu2020-02-141-76/+0
| | | | | | | | | | | | | | Commit c7c964b and dd01704 add header file for FIT table and update MpInitLib to support FIT based microcode shadow operation. There are comments that FIT is Intel specific specification instead of industry standard, which should not be placed in EDK2 MdePkg and UefiCpuPkg. This patch removes the header file added by c7c964b. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: Add PCCT table signature definitionKrzysztof Koch2020-02-136-1/+36
| | | | | | | | | | | | | | | The Platform Communications Channel Table (PCCT) was defined in: ACPI Specification Version 5.0, Errata A - Published Nov. 13, 2013. Starting from the Acpi50.h header file, there are definitions describing the table but a macro with the table's signature is missing. This patch adds the definition of Platform Communications Channel Table's signature to the relevant ACPI header files. Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg: Add PCI Express 5.0 Header FileFelix Polyudov2020-02-121-0/+136
| | | | | | | | The header includes Physical Layer PCI Express Extended Capability definitions based on section 7.7.6 of PCI Express Base Specification 5.0. Signed-off-by: Felix Polyudov <felixp@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 01:16:26 +0000