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* UefiCpuPkg/CpuDxe: Eliminate the unused variable.YuanhaoXie2023-10-121-9/+7
| | | | | | | | | | | | | This change does not introduce any functional modifications. Remove the unused mValidMtrrAddressMask and mValidMtrrBitsMask. Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/CpuDxe: Update RefreshMemoryAttributesFromMtrrRay Ni2023-10-091-273/+36
| | | | | | | | | | | | | | | | | | | | | | | Old implementation of RefreshMemoryAttributesFromMtrr directly retrieves the MTRR register content and applies the MTRR cache type to GCD database following the precedence order defined by SDM. The code can updated to simply get all the memory cache types for all memory through newly introduced API With the new introduced API MtrrGetMemoryAttributesInMtrrSettings. Benefits: 1. Remove the duplicated logic in CpuDxe driver that handles MTRR details. 2. Let the MtrrLib to handle the case when fixed MTRR is absent. (Old logic cannot handle the case.) Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: Update code to be more C11 compliant by using __func__Rebecca Cran2023-04-101-4/+4
| | | | | | | | | | | | | | __FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout UefiCpuPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* UefiCpuPkg/CpuDxe: Substract TME-MK KEY_ID_BITS from CPU max PARay Ni2023-04-011-2/+22
| | | | | | | | | | | | | | | | | | CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue to report the maximum physical address bits available for software to use, irrespective of the number of KeyID bits. So, we need to check if TME is enabled and adjust the PA size accordingly. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ahmad Anadani <ahmad.anadani@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/CpuDxe: Refactor to use CPUID definitionsRay Ni2023-04-011-10/+8
| | | | | | | | | | | | | | | | | The patch does not change any code behavior but only refactors by: * replaces the hardcode 0x80000000 with CPUID_EXTENDED_FUNCTION * replaces the hardcode 0x80000008 with CPUID_VIR_PHY_ADDRESS_SIZE * replace "UINT32 Eax" with "CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize" Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ahmad Anadani <ahmad.anadani@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* CpuException: Remove InitializeCpuInterruptHandlersRay Ni2022-06-101-5/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | InitializeCpuExceptionHandlers() expects caller allocates IDT while InitializeCpuInterruptHandlers() allocates 256 IDT entries itself. InitializeCpuExceptionHandlers() fills max 32 IDT entries allocated by caller. If caller allocates 10 entries, the API just fills 10 IDT entries. The inconsistency between the two APIs makes code hard to unerstand and hard to share. Because there is only one caller (CpuDxe) for InitializeCpuInterruptHandler(), this patch updates CpuDxe driver to allocates 256 IDT entries then call InitializeCpuExceptionHandlers(). This is also a backward compatible change. With this change, InitializeCpuInterruptHandlers() is removed completely. And InitializeCpuExceptionHandlers() fills max 32 entries for PEI and SMM instance, max 256 entries for DXE instance. Such behavior matches to the original one. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com>
* UefiCpuPkg: Apply uncrustify changesMichael Kubacki2021-12-071-191/+237
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()Michael D Kinney2021-12-071-3/+2
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767 Update use of DEBUG_CODE(Expression) if Expression is a complex code block with if/while/for/case statements that use {}. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: Add New Memory AttributesOleksiy Yakovlev2020-07-151-7/+4
| | | | | | | | | | | | | Add usage of EFI_MEMORY_SP and EFI_MEMORY_CPU_CRYPTO attributes introduced in UEFI 2.8. (UEFI 2.8, mantis 1919 and 1872). Use attributes bitmasks, defined in MdePkg. Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200702205039.52400-5-oleksiyy@ami.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuDxe: Fix few typosAntoine Coeur2020-02-101-4/+4
| | | | | | | | | | | | | | Fix few typos in comments and documentation. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Antoine Coeur <coeur@gmx.fr> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200207010831.9046-77-philmd@redhat.com>
* UefiCpuPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney2019-04-091-7/+1
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/CpuDxe: change level of DEBUG messageJian J Wang2018-08-301-1/+1
| | | | | | | | | | | | | | | | BZ#1127: https://bugzilla.tianocore.org/show_bug.cgi?id=1127 It's reported the debug message in CpuDxe driver is quite annoying in boot and shell, and slow down the boot process. To solve this issue, this patch changes the DEBUG_INFO to DEBUG_VERBOSE. On a typical Intel real platform, at least 16s boot time can be saved. Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg: Clean up source filesLiming Gao2018-06-281-4/+4
| | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg/CpuDxe: Enable protection for newly added page tableJian J Wang2017-12-121-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | One of the functionalities of CpuDxe is to update memory paging attributes. If page table protection is applied, it must be disabled temporarily before any attributes update and enabled again afterwards. This patch makes use of the same way as DxeIpl to allocate page table memory from reserved memory pool, which helps to reduce potential "split" operation and recursive calling of SetMemorySpaceAttributes(). Laszlo (lersek@redhat.com) did a regression test on QEMU virtual platform with one middle version of this series patch. The details can be found at https://lists.01.org/pipermail/edk2-devel/2017-December/018625.html There're a few changes after his work. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg/CpuDxe: Fix assert issue on IA32 platformJian J Wang2017-09-301-10/+40
| | | | | | | | | | | | | | | | | This patch is to fix an assert issue during booting IA32 platforms such as OvmfIa32 or Quark. This issue is caused by trying to access page table on a platform without page table. A check is added to avoid the assert. Bug tracker: https://bugzilla.tianocore.org/show_bug.cgi?id=724 Cc: Star Zeng <star.zeng@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/CpuDxe: Fix out-of-sync issue in page attributesJian J Wang2017-09-211-0/+5
| | | | | | | | | | | | | | | | From CpuDxe driver perspective, it doesn't update GCD memory attributes from current page table setup during its initialization. So the memory attributes in GCD might not reflect all memory attributes in real world. Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Suggested-by: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiCpuPkg CpuDxe: Remove reference deprecated macro.Eric Dong2017-08-071-11/+11
| | | | | | | | Cc: Jeff Fan <jeff.fan@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg CpuDxe: Enhance get mtrr mask logic.Eric Dong2017-08-071-7/+6
| | | | | | | | | | | In order to not use the deprecated macro, refine get mtrr mask value logic. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* UefiCpuPkg: Move ProgramVirtualWireMode() to MpInitLibJeff Fan2017-04-261-5/+0
| | | | | | | | | | | | | | | In PEI phase, BSP did not program vitural wired mode while APs did. Move program virtual wired mode from CpuDxe to MpInitLib, thus it could benefit on both CpuDxe and CpuMpPei. https://bugzilla.tianocore.org/show_bug.cgi?id=496 Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* UefiCpuPkg/CpuDxe: Do not ASSERT on AllocateMemorySpace() errorJeff Fan2017-02-271-1/+9
| | | | | | | | | | | | | | | | | | | | | | | Platform PEI may add LOCAL APIC memory mapped space into EFI_HOB_MEMORY_ALLOCATION. Or platform may allocate this range before. So, we skip AllocateMemorySpace()'s return status checking. Instead, we add one DEBUG message for possible trace. https://bugzilla.tianocore.org/show_bug.cgi?id=390 This updating is suggested by Ersek's comments at https://www.mail-archive.com/edk2-devel@lists.01.org/msg22585.html Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuDxe: Replace EFI_D_xxx with DEBUG_xxx in DEBUG()Jeff Fan2017-02-241-4/+4
| | | | | | | | | | Cc: Laszlo Ersek <lersek@redhat.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuDxe: Fix hard code actual TimerPeriod valueJeff Fan2017-02-221-2/+22
| | | | | | | | | | | | | | | Current CpuGetTimerValue() implementation return hard code TimerPeriod value. We could calculate the actual TimerPeriod value over period of time (100us) at the first time invoking CpuGetTimerValue() and save the TimerPeriod value into one global variable to avoid delay at the next CpuGetTimerValue() invoking. https://bugzilla.tianocore.org/show_bug.cgi?id=382 Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
* UefiCpuPkg/CpuDxe: Add Local APIC memory mapped space in GCDJeff Fan2017-02-221-0/+35
| | | | | | | | | | | | | | | | | | | | | Local APIC memory mapped space should be added into GCD and be allocated. Otherwise, UEFI firmware cannot get correct memory map for it. For example, SMM profile feature needs to get the completed MMIO map to protect them. v2: Consume AddMemoryMappedIoSpace() to handle the case that Local APIC memory space has already been added before. https://bugzilla.tianocore.org/show_bug.cgi?id=390 Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuDxe: Copy two functions from PciHostBridgeJeff Fan2017-02-221-0/+148
| | | | | | | | | | | | | | | | Copy AddMemoryMappedIoSpace() and IntersectMemoryDescriptor() from MdeModulePkg\Bus\Pci\PciHostBridgeDxe\PciHostBridge.c. https://bugzilla.tianocore.org/show_bug.cgi?id=390 Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/CpuDxe: Add memory attribute setting.Jiewen Yao2017-02-221-59/+82
| | | | | | | | | | | | | | Add memory attribute setting in CpuArch protocol. Previous SetMemoryAttributes() API only supports cache attribute setting. This patch updated SetMemoryAttributes() API to support memory attribute setting by updating CPU page table. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* UefiCpuPkg/CpuDxe: Move SetMtrrsFromBuffer() location.Jeff Fan2016-08-171-0/+15
| | | | | | | | | | | | Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/CpuDxe: Consume MpInitLib to produce CPU MP Protocol servicesJeff Fan2016-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Consume MP Initialize library to produce CPU MP Protocol services to simply the code. v4: 1. Update CpuDxe.c file header to mention it produces CPU Arch protocol. 2. Update BistData type from UINT32 to EFI_HEALTH_FLAG. 3. Move some header location from CpuMp.h to CpuDxe.h. v3: 1. Move the code Consume MpInitLib APIs to produce CPU MP Protocol from patch #40 to this patch. 2. Add DxeMpInitLib.inf in DSC file Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
* UefiCpuPkg/CpuDxe: StartupAllAPs in parallel modeJeff Fan2016-07-201-2/+2
| | | | | | | | | | | | | | SetMemoryAttributes() will sync BSP's MTRRs settings to all APs by StartupAllAPs service in serial mode. It may caused much performance impact if there are too much processors in system. This update is to invoke StartupAllAps in parallel mode. IA32 SDM does suggest to program MTRRs in parallel mode. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* UefiCpuPkg: CpuDxe: broadcast MTRR changes to APsLaszlo Ersek2015-10-191-0/+26
| | | | | | | | | | | | | | | | | | | | | | The Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuArchDxe driver applies any MTRR changes to APs, if the EFI_MP_SERVICES_PROTOCOL is available. We should do the same. Additionally, the broadcast should occur at MP startup as well, not only when MTRR settings are changed. The inspiration is taken from Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe/ (see the EarlyMpInit() function and its call sites in "ProcessorConfig.c"). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18632 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg/CpuDxe: Add no-op InitializeMpSupportJordan Justen2014-11-131-0/+3
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16345 6f19259b-4bc3-4df7-8a09-765794883524
* 1. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance ↵Jeff Fan2013-11-221-412/+12
| | | | | | | | | | | | | | | | DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf. 2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions. 3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
* Fix several DEBUG_ERROR messages that are unnecessarily verbose. Several of ↵Samer El-Haj-Mahmoud2013-10-081-3/+3
| | | | | | | | | | | these are marked as DEBUG_ERROR when they are really not errors. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hp.com> reviewed-by: Fan, Jeff <jeff.fan@intel.com> reviewed-by: Tian, Feng <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14750 6f19259b-4bc3-4df7-8a09-765794883524
* Add missing braces around initializer.lzeng142012-10-111-1/+1
| | | | | | | | | | | Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Qian Ouyang <qian.ouyang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13817 6f19259b-4bc3-4df7-8a09-765794883524
* Add type cast to avoid sign extension on x64 tip.vanjeff2012-09-101-1/+1
| | | | | | | signed-off-by: Jeff Fan <jeff.fan@intel.com> reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13709 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg CpuDxe: Call UefiCpuLib.InitializeFloatingPointUnits () to ↵rsun32012-07-061-0/+2
| | | | | | | | | | | | initialize X87 FPU Control Word for BSP. For a platform tip with 32-bit PEI+64-bit DXE, InitializeFloatingPointUnits () should be called for BSP in the DXE phase. Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13511 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg: Added code to enable Local APIC.geekboy15a2012-05-181-4/+9
| | | | | | | | | | This patch enables interrupt delivery via the Local APIC as part of the initialization process. Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com> Reviewed-by: Rosenbaum, Lee G <lee.g.rosenbaum@intel.com> Reviewed-by: Sun Rui <rui.sun@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13338 6f19259b-4bc3-4df7-8a09-765794883524
* Restore original IDT entry if RegisterInterruptHandler() was used to ↵vanjeff2011-11-161-1/+36
| | | | | | | | | | | unregister user defined interrupt handler. Signed-off-by: vanjeff Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12719 6f19259b-4bc3-4df7-8a09-765794883524
* Roll back the change on GetMemorySpaceAttributeFromMtrrType()'s parameter ↵vanjeff2011-10-311-6/+6
| | | | | | | | | | type, from MTRR_MEMORY_CACHE_TYPE to UINT8 since MtrrAttributes may be the value not belongs to MTRR_MEMORY_CACHE_TYPE. Signed-off-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12609 6f19259b-4bc3-4df7-8a09-765794883524
* 1. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library.vanjeff2011-10-281-11/+29
| | | | | | | | | | 2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module. 3. Add go though for UC attributes. Signed-off-by: vanjeff Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg/CpuDxe: Put CPU to sleep during Idle eventsjljusten2011-06-161-0/+33
| | | | | | | | | | | | When the MdeModulePkg gCoreEventIdleGuid event is signaled, CpuSleep is called. This will cause the CPU to sleep until the next interrupt occurs. Signed-off-by: jljusten Reviewed-by: mdkinney Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11842 6f19259b-4bc3-4df7-8a09-765794883524
* CpuDxe entry point () only register exception handlers unassigned before.vanjeff2011-05-251-1/+1
| | | | | | | Signed-off-by: vanjeff Reviewed-by: rsun3 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11699 6f19259b-4bc3-4df7-8a09-765794883524
* Per PI 1.2 errata B spec, for SetMemoryAttributes() service of CPU ↵rsun32011-05-241-14/+29
| | | | | | | | | | | | Architecture Protocol, EFI_INVALID_PARAMETER should be returned for cases: If Attributes specifies a combination of memory attributes that cannot be set together, then EFI_INVALID_PARAMETER is returned. For example, if both EFI_MEMORY_UC and EFI_MEMORY_WT are set. Signed-off-by: rsun3 Reviewed-by: jyao1 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11694 6f19259b-4bc3-4df7-8a09-765794883524
* Add DEBUG() macros for DEBUG_CACHE to MTRR Library show all changes memory ↵mdkinney2011-01-061-7/+2
| | | | | | | | | | caches setting changes. If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
* Fix a bug that the size of a gate descriptor in the IDT is 8 bytes. The size ↵rsun32010-12-171-1/+1
| | | | | | is 8 bytes in 32-bit mode, while it is 16 bytes in 64-bit mode. Replace the hard-coded size with a sizeof. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11177 6f19259b-4bc3-4df7-8a09-765794883524
* Refine code to follow the coding style.ydong102010-11-011-0/+14
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10992 6f19259b-4bc3-4df7-8a09-765794883524
* Refine code to remove type converting warning.ydong102010-10-261-1/+1
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10982 6f19259b-4bc3-4df7-8a09-765794883524
* UefiCpuPkg CpuDxe: Fix bug with CPU Arch RegisterInterruptHandlerjljusten2010-10-221-30/+77
| | | | | | | | | | | | | | | The change in r10765 introduced an issue where inherited interrupt handlers would override the driver's RegisterInterruptHandler functionality. DUET installs a IDT with 256 entries early in it's boot. Therefore, no interrupt handlers could be installed with DUET while using UefiCpuPkg/CpuDxe (instead of DuetPkg/CpuDxe). This change forces the IDT to be modified when RegisterInterruptHandler is called to ensure the UEFI handler will be installed properly. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10972 6f19259b-4bc3-4df7-8a09-765794883524
* Add explicit type cast to suppress possible warning of precession loss.xli242010-08-101-1/+1
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10783 6f19259b-4bc3-4df7-8a09-765794883524
* Inherit entries from previous IDT when new IDT is installed.mdkinney2010-08-031-6/+23
| | | | | | | Update CS in each inherited IDT entry to match CS for the new GDT. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10765 6f19259b-4bc3-4df7-8a09-765794883524
* Code refinement.xli242010-07-131-6/+5
| | | | git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-15 03:40:37 +0000