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* UefiCpuPkg/CpuTimerDxeRiscV64: Add support for SstcSunil V L2024-01-111-0/+2
| | | | | | | | | | | | | | | | | Sstc extension allows to program the timer and receive the interrupt without using an SBI call. This reduces the latency to generate the timer interrupt. So, detect whether Sstc extension is supported and use the stimecmp register directly to program the timer interrupt. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Dhaval Sharma <dhaval@rivosinc.com>
* UefiCpuPkg: CpuTimerDxeRiscV64: Fix incorrect value sent to SbiSetTimerTuan Phan2023-06-151-1/+1
| | | | | | | | SbiSetTimer expects core tick value. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* UefiCpuPkg: Add CpuTimerDxeRiscV64 moduleSunil V L2023-02-161-0/+177
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 This DXE module initializes the timer interrupt handler and installs the Arch Timer protocol. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Acked-by: Ray Ni <ray.ni@Intel.com>